13a1317d3b
Now that rte_device is available, drivers can start using its members (numa, name) as well as link themselves into another rte_device list. As of now no one is using this list, but can be used for moving over all devices (pdev/vdev/Xdev) and perform bulk actions (like cleanup). Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> [Shreyansh: Reword commit log for extra rte_device list] Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com> Acked-by: David Marchand <david.marchand@6wind.com>
761 lines
21 KiB
C
761 lines
21 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright 2015 6WIND S.A.
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* Copyright 2015 Mellanox.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of 6WIND S.A. nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stddef.h>
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#include <unistd.h>
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#include <string.h>
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#include <assert.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <errno.h>
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#include <net/if.h>
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/* Verbs header. */
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/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-pedantic"
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#endif
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#include <infiniband/verbs.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-pedantic"
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#endif
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/* DPDK headers don't like -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-pedantic"
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#endif
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#include <rte_malloc.h>
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#include <rte_ethdev.h>
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#include <rte_pci.h>
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#include <rte_common.h>
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#include <rte_kvargs.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-pedantic"
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#endif
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#include "mlx5.h"
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#include "mlx5_utils.h"
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#include "mlx5_rxtx.h"
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#include "mlx5_autoconf.h"
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#include "mlx5_defs.h"
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/* Device parameter to enable RX completion queue compression. */
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#define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
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/* Device parameter to configure inline send. */
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#define MLX5_TXQ_INLINE "txq_inline"
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/*
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* Device parameter to configure the number of TX queues threshold for
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* enabling inline send.
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*/
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#define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
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/* Device parameter to enable multi-packet send WQEs. */
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#define MLX5_TXQ_MPW_EN "txq_mpw_en"
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/**
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* Retrieve integer value from environment variable.
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*
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* @param[in] name
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* Environment variable name.
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*
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* @return
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* Integer value, 0 if the variable is not set.
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*/
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int
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mlx5_getenv_int(const char *name)
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{
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const char *val = getenv(name);
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if (val == NULL)
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return 0;
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return atoi(val);
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}
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/**
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* DPDK callback to close the device.
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*
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* Destroy all queues and objects, free memory.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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*/
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static void
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mlx5_dev_close(struct rte_eth_dev *dev)
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{
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struct priv *priv = mlx5_get_priv(dev);
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unsigned int i;
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priv_lock(priv);
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DEBUG("%p: closing device \"%s\"",
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(void *)dev,
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((priv->ctx != NULL) ? priv->ctx->device->name : ""));
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/* In case mlx5_dev_stop() has not been called. */
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priv_dev_interrupt_handler_uninstall(priv, dev);
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priv_special_flow_disable_all(priv);
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priv_mac_addrs_disable(priv);
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priv_destroy_hash_rxqs(priv);
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/* Remove flow director elements. */
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priv_fdir_disable(priv);
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priv_fdir_delete_filters_list(priv);
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/* Prevent crashes when queues are still in use. */
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dev->rx_pkt_burst = removed_rx_burst;
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dev->tx_pkt_burst = removed_tx_burst;
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if (priv->rxqs != NULL) {
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/* XXX race condition if mlx5_rx_burst() is still running. */
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usleep(1000);
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for (i = 0; (i != priv->rxqs_n); ++i) {
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struct rxq *rxq = (*priv->rxqs)[i];
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struct rxq_ctrl *rxq_ctrl;
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if (rxq == NULL)
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continue;
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rxq_ctrl = container_of(rxq, struct rxq_ctrl, rxq);
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(*priv->rxqs)[i] = NULL;
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rxq_cleanup(rxq_ctrl);
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rte_free(rxq_ctrl);
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}
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priv->rxqs_n = 0;
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priv->rxqs = NULL;
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}
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if (priv->txqs != NULL) {
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/* XXX race condition if mlx5_tx_burst() is still running. */
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usleep(1000);
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for (i = 0; (i != priv->txqs_n); ++i) {
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struct txq *txq = (*priv->txqs)[i];
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struct txq_ctrl *txq_ctrl;
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if (txq == NULL)
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continue;
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txq_ctrl = container_of(txq, struct txq_ctrl, txq);
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(*priv->txqs)[i] = NULL;
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txq_cleanup(txq_ctrl);
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rte_free(txq_ctrl);
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}
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priv->txqs_n = 0;
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priv->txqs = NULL;
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}
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if (priv->pd != NULL) {
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assert(priv->ctx != NULL);
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claim_zero(ibv_dealloc_pd(priv->pd));
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claim_zero(ibv_close_device(priv->ctx));
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} else
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assert(priv->ctx == NULL);
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if (priv->rss_conf != NULL) {
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for (i = 0; (i != hash_rxq_init_n); ++i)
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rte_free((*priv->rss_conf)[i]);
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rte_free(priv->rss_conf);
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}
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if (priv->reta_idx != NULL)
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rte_free(priv->reta_idx);
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priv_unlock(priv);
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memset(priv, 0, sizeof(*priv));
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}
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static const struct eth_dev_ops mlx5_dev_ops = {
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.dev_configure = mlx5_dev_configure,
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.dev_start = mlx5_dev_start,
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.dev_stop = mlx5_dev_stop,
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.dev_set_link_down = mlx5_set_link_down,
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.dev_set_link_up = mlx5_set_link_up,
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.dev_close = mlx5_dev_close,
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.promiscuous_enable = mlx5_promiscuous_enable,
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.promiscuous_disable = mlx5_promiscuous_disable,
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.allmulticast_enable = mlx5_allmulticast_enable,
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.allmulticast_disable = mlx5_allmulticast_disable,
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.link_update = mlx5_link_update,
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.stats_get = mlx5_stats_get,
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.stats_reset = mlx5_stats_reset,
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.dev_infos_get = mlx5_dev_infos_get,
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.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
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.vlan_filter_set = mlx5_vlan_filter_set,
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.rx_queue_setup = mlx5_rx_queue_setup,
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.tx_queue_setup = mlx5_tx_queue_setup,
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.rx_queue_release = mlx5_rx_queue_release,
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.tx_queue_release = mlx5_tx_queue_release,
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.flow_ctrl_get = mlx5_dev_get_flow_ctrl,
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.flow_ctrl_set = mlx5_dev_set_flow_ctrl,
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.mac_addr_remove = mlx5_mac_addr_remove,
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.mac_addr_add = mlx5_mac_addr_add,
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.mac_addr_set = mlx5_mac_addr_set,
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.mtu_set = mlx5_dev_set_mtu,
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.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
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.vlan_offload_set = mlx5_vlan_offload_set,
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.reta_update = mlx5_dev_rss_reta_update,
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.reta_query = mlx5_dev_rss_reta_query,
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.rss_hash_update = mlx5_rss_hash_update,
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.rss_hash_conf_get = mlx5_rss_hash_conf_get,
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.filter_ctrl = mlx5_dev_filter_ctrl,
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};
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static struct {
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struct rte_pci_addr pci_addr; /* associated PCI address */
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uint32_t ports; /* physical ports bitfield. */
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} mlx5_dev[32];
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/**
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* Get device index in mlx5_dev[] from PCI bus address.
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*
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* @param[in] pci_addr
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* PCI bus address to look for.
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*
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* @return
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* mlx5_dev[] index on success, -1 on failure.
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*/
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static int
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mlx5_dev_idx(struct rte_pci_addr *pci_addr)
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{
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unsigned int i;
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int ret = -1;
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assert(pci_addr != NULL);
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for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) {
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if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) &&
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(mlx5_dev[i].pci_addr.bus == pci_addr->bus) &&
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(mlx5_dev[i].pci_addr.devid == pci_addr->devid) &&
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(mlx5_dev[i].pci_addr.function == pci_addr->function))
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return i;
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if ((mlx5_dev[i].ports == 0) && (ret == -1))
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ret = i;
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}
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return ret;
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}
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/**
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* Verify and store value for device argument.
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*
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* @param[in] key
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* Key argument to verify.
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* @param[in] val
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* Value associated with key.
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* @param opaque
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* User data.
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*
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* @return
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* 0 on success, negative errno value on failure.
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*/
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static int
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mlx5_args_check(const char *key, const char *val, void *opaque)
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{
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struct priv *priv = opaque;
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unsigned long tmp;
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errno = 0;
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tmp = strtoul(val, NULL, 0);
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if (errno) {
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WARN("%s: \"%s\" is not a valid integer", key, val);
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return errno;
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}
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if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
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priv->cqe_comp = !!tmp;
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} else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
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priv->txq_inline = tmp;
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} else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
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priv->txqs_inline = tmp;
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} else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
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priv->mps = !!tmp;
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} else {
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WARN("%s: unknown parameter", key);
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return -EINVAL;
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}
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return 0;
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}
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/**
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* Parse device parameters.
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*
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* @param priv
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* Pointer to private structure.
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* @param devargs
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* Device arguments structure.
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*
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* @return
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* 0 on success, errno value on failure.
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*/
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static int
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mlx5_args(struct priv *priv, struct rte_devargs *devargs)
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{
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const char **params = (const char *[]){
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MLX5_RXQ_CQE_COMP_EN,
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MLX5_TXQ_INLINE,
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MLX5_TXQS_MIN_INLINE,
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MLX5_TXQ_MPW_EN,
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NULL,
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};
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struct rte_kvargs *kvlist;
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int ret = 0;
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int i;
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if (devargs == NULL)
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return 0;
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/* Following UGLY cast is done to pass checkpatch. */
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kvlist = rte_kvargs_parse(devargs->args, params);
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if (kvlist == NULL)
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return 0;
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/* Process parameters. */
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for (i = 0; (params[i] != NULL); ++i) {
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if (rte_kvargs_count(kvlist, params[i])) {
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ret = rte_kvargs_process(kvlist, params[i],
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mlx5_args_check, priv);
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if (ret != 0)
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return ret;
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}
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}
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rte_kvargs_free(kvlist);
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return 0;
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}
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static struct eth_driver mlx5_driver;
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/**
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* DPDK callback to register a PCI device.
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*
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* This function creates an Ethernet device for each port of a given
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* PCI device.
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*
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* @param[in] pci_drv
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* PCI driver structure (mlx5_driver).
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* @param[in] pci_dev
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* PCI device information.
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*
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* @return
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* 0 on success, negative errno value on failure.
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*/
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static int
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mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
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{
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struct ibv_device **list;
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struct ibv_device *ibv_dev;
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int err = 0;
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struct ibv_context *attr_ctx = NULL;
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struct ibv_device_attr device_attr;
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unsigned int sriov;
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unsigned int mps;
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int idx;
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int i;
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(void)pci_drv;
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assert(pci_drv == &mlx5_driver.pci_drv);
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/* Get mlx5_dev[] index. */
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idx = mlx5_dev_idx(&pci_dev->addr);
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if (idx == -1) {
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ERROR("this driver cannot support any more adapters");
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return -ENOMEM;
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}
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DEBUG("using driver device index %d", idx);
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/* Save PCI address. */
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mlx5_dev[idx].pci_addr = pci_dev->addr;
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list = ibv_get_device_list(&i);
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if (list == NULL) {
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assert(errno);
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if (errno == ENOSYS) {
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WARN("cannot list devices, is ib_uverbs loaded?");
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return 0;
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}
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return -errno;
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}
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assert(i >= 0);
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/*
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* For each listed device, check related sysfs entry against
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* the provided PCI ID.
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*/
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while (i != 0) {
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struct rte_pci_addr pci_addr;
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--i;
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DEBUG("checking device \"%s\"", list[i]->name);
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if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
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continue;
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if ((pci_dev->addr.domain != pci_addr.domain) ||
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(pci_dev->addr.bus != pci_addr.bus) ||
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(pci_dev->addr.devid != pci_addr.devid) ||
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(pci_dev->addr.function != pci_addr.function))
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continue;
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sriov = ((pci_dev->id.device_id ==
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PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
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(pci_dev->id.device_id ==
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PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
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/* Multi-packet send is only supported by ConnectX-4 Lx PF. */
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mps = (pci_dev->id.device_id ==
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PCI_DEVICE_ID_MELLANOX_CONNECTX4LX);
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INFO("PCI information matches, using device \"%s\""
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" (SR-IOV: %s, MPS: %s)",
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list[i]->name,
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sriov ? "true" : "false",
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mps ? "true" : "false");
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attr_ctx = ibv_open_device(list[i]);
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err = errno;
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break;
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}
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if (attr_ctx == NULL) {
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ibv_free_device_list(list);
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switch (err) {
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case 0:
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WARN("cannot access device, is mlx5_ib loaded?");
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return 0;
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case EINVAL:
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WARN("cannot use device, are drivers up to date?");
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return 0;
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}
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assert(err > 0);
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return -err;
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}
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ibv_dev = list[i];
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DEBUG("device opened");
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if (ibv_query_device(attr_ctx, &device_attr))
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goto error;
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INFO("%u port(s) detected", device_attr.phys_port_cnt);
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for (i = 0; i < device_attr.phys_port_cnt; i++) {
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uint32_t port = i + 1; /* ports are indexed from one */
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uint32_t test = (1 << i);
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struct ibv_context *ctx = NULL;
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struct ibv_port_attr port_attr;
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struct ibv_pd *pd = NULL;
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struct priv *priv = NULL;
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struct rte_eth_dev *eth_dev;
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struct ibv_exp_device_attr exp_device_attr;
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struct ether_addr mac;
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uint16_t num_vfs = 0;
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exp_device_attr.comp_mask =
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IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
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IBV_EXP_DEVICE_ATTR_RX_HASH |
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IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
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IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
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0;
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DEBUG("using port %u (%08" PRIx32 ")", port, test);
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ctx = ibv_open_device(ibv_dev);
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if (ctx == NULL)
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goto port_error;
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/* Check port status. */
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err = ibv_query_port(ctx, port, &port_attr);
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if (err) {
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ERROR("port query failed: %s", strerror(err));
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goto port_error;
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}
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if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
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ERROR("port %d is not configured in Ethernet mode",
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port);
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goto port_error;
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}
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|
|
if (port_attr.state != IBV_PORT_ACTIVE)
|
|
DEBUG("port %d is not active: \"%s\" (%d)",
|
|
port, ibv_port_state_str(port_attr.state),
|
|
port_attr.state);
|
|
|
|
/* Allocate protection domain. */
|
|
pd = ibv_alloc_pd(ctx);
|
|
if (pd == NULL) {
|
|
ERROR("PD allocation failure");
|
|
err = ENOMEM;
|
|
goto port_error;
|
|
}
|
|
|
|
mlx5_dev[idx].ports |= test;
|
|
|
|
/* from rte_ethdev.c */
|
|
priv = rte_zmalloc("ethdev private structure",
|
|
sizeof(*priv),
|
|
RTE_CACHE_LINE_SIZE);
|
|
if (priv == NULL) {
|
|
ERROR("priv allocation failure");
|
|
err = ENOMEM;
|
|
goto port_error;
|
|
}
|
|
|
|
priv->ctx = ctx;
|
|
priv->device_attr = device_attr;
|
|
priv->port = port;
|
|
priv->pd = pd;
|
|
priv->mtu = ETHER_MTU;
|
|
priv->mps = mps; /* Enable MPW by default if supported. */
|
|
priv->cqe_comp = 1; /* Enable compression by default. */
|
|
err = mlx5_args(priv, pci_dev->device.devargs);
|
|
if (err) {
|
|
ERROR("failed to process device arguments: %s",
|
|
strerror(err));
|
|
goto port_error;
|
|
}
|
|
if (ibv_exp_query_device(ctx, &exp_device_attr)) {
|
|
ERROR("ibv_exp_query_device() failed");
|
|
goto port_error;
|
|
}
|
|
|
|
priv->hw_csum =
|
|
((exp_device_attr.exp_device_cap_flags &
|
|
IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
|
|
(exp_device_attr.exp_device_cap_flags &
|
|
IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
|
|
DEBUG("checksum offloading is %ssupported",
|
|
(priv->hw_csum ? "" : "not "));
|
|
|
|
priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
|
|
IBV_EXP_DEVICE_VXLAN_SUPPORT);
|
|
DEBUG("L2 tunnel checksum offloads are %ssupported",
|
|
(priv->hw_csum_l2tun ? "" : "not "));
|
|
|
|
priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
|
|
/* Remove this check once DPDK supports larger/variable
|
|
* indirection tables. */
|
|
if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
|
|
priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
|
|
DEBUG("maximum RX indirection table size is %u",
|
|
priv->ind_table_max_size);
|
|
priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
|
|
IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
|
|
DEBUG("VLAN stripping is %ssupported",
|
|
(priv->hw_vlan_strip ? "" : "not "));
|
|
|
|
priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
|
|
IBV_EXP_DEVICE_SCATTER_FCS);
|
|
DEBUG("FCS stripping configuration is %ssupported",
|
|
(priv->hw_fcs_strip ? "" : "not "));
|
|
|
|
priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
|
|
DEBUG("hardware RX end alignment padding is %ssupported",
|
|
(priv->hw_padding ? "" : "not "));
|
|
|
|
priv_get_num_vfs(priv, &num_vfs);
|
|
priv->sriov = (num_vfs || sriov);
|
|
if (priv->mps && !mps) {
|
|
ERROR("multi-packet send not supported on this device"
|
|
" (" MLX5_TXQ_MPW_EN ")");
|
|
err = ENOTSUP;
|
|
goto port_error;
|
|
}
|
|
/* Allocate and register default RSS hash keys. */
|
|
priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
|
|
sizeof((*priv->rss_conf)[0]), 0);
|
|
if (priv->rss_conf == NULL) {
|
|
err = ENOMEM;
|
|
goto port_error;
|
|
}
|
|
err = rss_hash_rss_conf_new_key(priv,
|
|
rss_hash_default_key,
|
|
rss_hash_default_key_len,
|
|
ETH_RSS_PROTO_MASK);
|
|
if (err)
|
|
goto port_error;
|
|
/* Configure the first MAC address by default. */
|
|
if (priv_get_mac(priv, &mac.addr_bytes)) {
|
|
ERROR("cannot get MAC address, is mlx5_en loaded?"
|
|
" (errno: %s)", strerror(errno));
|
|
goto port_error;
|
|
}
|
|
INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
|
|
priv->port,
|
|
mac.addr_bytes[0], mac.addr_bytes[1],
|
|
mac.addr_bytes[2], mac.addr_bytes[3],
|
|
mac.addr_bytes[4], mac.addr_bytes[5]);
|
|
/* Register MAC address. */
|
|
claim_zero(priv_mac_addr_add(priv, 0,
|
|
(const uint8_t (*)[ETHER_ADDR_LEN])
|
|
mac.addr_bytes));
|
|
/* Initialize FD filters list. */
|
|
err = fdir_init_filters_list(priv);
|
|
if (err)
|
|
goto port_error;
|
|
#ifndef NDEBUG
|
|
{
|
|
char ifname[IF_NAMESIZE];
|
|
|
|
if (priv_get_ifname(priv, &ifname) == 0)
|
|
DEBUG("port %u ifname is \"%s\"",
|
|
priv->port, ifname);
|
|
else
|
|
DEBUG("port %u ifname is unknown", priv->port);
|
|
}
|
|
#endif
|
|
/* Get actual MTU if possible. */
|
|
priv_get_mtu(priv, &priv->mtu);
|
|
DEBUG("port %u MTU is %u", priv->port, priv->mtu);
|
|
|
|
/* from rte_ethdev.c */
|
|
{
|
|
char name[RTE_ETH_NAME_MAX_LEN];
|
|
|
|
snprintf(name, sizeof(name), "%s port %u",
|
|
ibv_get_device_name(ibv_dev), port);
|
|
eth_dev = rte_eth_dev_allocate(name);
|
|
}
|
|
if (eth_dev == NULL) {
|
|
ERROR("can not allocate rte ethdev");
|
|
err = ENOMEM;
|
|
goto port_error;
|
|
}
|
|
|
|
/* Secondary processes have to use local storage for their
|
|
* private data as well as a copy of eth_dev->data, but this
|
|
* pointer must not be modified before burst functions are
|
|
* actually called. */
|
|
if (mlx5_is_secondary()) {
|
|
struct mlx5_secondary_data *sd =
|
|
&mlx5_secondary_data[eth_dev->data->port_id];
|
|
sd->primary_priv = eth_dev->data->dev_private;
|
|
if (sd->primary_priv == NULL) {
|
|
ERROR("no private data for port %u",
|
|
eth_dev->data->port_id);
|
|
err = EINVAL;
|
|
goto port_error;
|
|
}
|
|
sd->shared_dev_data = eth_dev->data;
|
|
rte_spinlock_init(&sd->lock);
|
|
memcpy(sd->data.name, sd->shared_dev_data->name,
|
|
sizeof(sd->data.name));
|
|
sd->data.dev_private = priv;
|
|
sd->data.rx_mbuf_alloc_failed = 0;
|
|
sd->data.mtu = ETHER_MTU;
|
|
sd->data.port_id = sd->shared_dev_data->port_id;
|
|
sd->data.mac_addrs = priv->mac;
|
|
eth_dev->tx_pkt_burst = mlx5_tx_burst_secondary_setup;
|
|
eth_dev->rx_pkt_burst = mlx5_rx_burst_secondary_setup;
|
|
} else {
|
|
eth_dev->data->dev_private = priv;
|
|
eth_dev->data->rx_mbuf_alloc_failed = 0;
|
|
eth_dev->data->mtu = ETHER_MTU;
|
|
eth_dev->data->mac_addrs = priv->mac;
|
|
}
|
|
|
|
eth_dev->pci_dev = pci_dev;
|
|
rte_eth_copy_pci_info(eth_dev, pci_dev);
|
|
eth_dev->driver = &mlx5_driver;
|
|
priv->dev = eth_dev;
|
|
eth_dev->dev_ops = &mlx5_dev_ops;
|
|
|
|
TAILQ_INIT(ð_dev->link_intr_cbs);
|
|
|
|
/* Bring Ethernet device up. */
|
|
DEBUG("forcing Ethernet interface up");
|
|
priv_set_flags(priv, ~IFF_UP, IFF_UP);
|
|
continue;
|
|
|
|
port_error:
|
|
if (priv) {
|
|
rte_free(priv->rss_conf);
|
|
rte_free(priv);
|
|
}
|
|
if (pd)
|
|
claim_zero(ibv_dealloc_pd(pd));
|
|
if (ctx)
|
|
claim_zero(ibv_close_device(ctx));
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* XXX if something went wrong in the loop above, there is a resource
|
|
* leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
|
|
* long as the dpdk does not provide a way to deallocate a ethdev and a
|
|
* way to enumerate the registered ethdevs to free the previous ones.
|
|
*/
|
|
|
|
/* no port found, complain */
|
|
if (!mlx5_dev[idx].ports) {
|
|
err = ENODEV;
|
|
goto error;
|
|
}
|
|
|
|
error:
|
|
if (attr_ctx)
|
|
claim_zero(ibv_close_device(attr_ctx));
|
|
if (list)
|
|
ibv_free_device_list(list);
|
|
assert(err >= 0);
|
|
return -err;
|
|
}
|
|
|
|
static const struct rte_pci_id mlx5_pci_id_map[] = {
|
|
{
|
|
RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
|
|
PCI_DEVICE_ID_MELLANOX_CONNECTX4)
|
|
},
|
|
{
|
|
RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
|
|
PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
|
|
},
|
|
{
|
|
RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
|
|
PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
|
|
},
|
|
{
|
|
RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
|
|
PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
|
|
},
|
|
{
|
|
.vendor_id = 0
|
|
}
|
|
};
|
|
|
|
static struct eth_driver mlx5_driver = {
|
|
.pci_drv = {
|
|
.driver = {
|
|
.name = MLX5_DRIVER_NAME
|
|
},
|
|
.id_table = mlx5_pci_id_map,
|
|
.probe = mlx5_pci_probe,
|
|
.drv_flags = RTE_PCI_DRV_INTR_LSC,
|
|
},
|
|
.dev_private_size = sizeof(struct priv)
|
|
};
|
|
|
|
/**
|
|
* Driver initialization routine.
|
|
*/
|
|
RTE_INIT(rte_mlx5_pmd_init);
|
|
static void
|
|
rte_mlx5_pmd_init(void)
|
|
{
|
|
/*
|
|
* RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
|
|
* huge pages. Calling ibv_fork_init() during init allows
|
|
* applications to use fork() safely for purposes other than
|
|
* using this PMD, which is not supported in forked processes.
|
|
*/
|
|
setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
|
|
ibv_fork_init();
|
|
rte_eal_pci_register(&mlx5_driver.pci_drv);
|
|
}
|
|
|
|
DRIVER_EXPORT_NAME(net_mlx5, __COUNTER__);
|
|
DRIVER_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
|