fae4b8c47c
For x86 platform, the rq cqe without cache aligned, which can
improve performance for some gateway scenarios.
Fixes: 361a9ccf81 ("net/hinic: optimize Rx performance")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
136 lines
2.6 KiB
C
136 lines
2.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*/
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#ifndef _HINIC_PMD_RX_H_
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#define _HINIC_PMD_RX_H_
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#define HINIC_DEFAULT_RX_FREE_THRESH 32
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#define HINIC_RSS_OFFLOAD_ALL ( \
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ETH_RSS_IPV4 | \
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ETH_RSS_FRAG_IPV4 |\
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ETH_RSS_NONFRAG_IPV4_TCP | \
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ETH_RSS_NONFRAG_IPV4_UDP | \
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ETH_RSS_IPV6 | \
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ETH_RSS_FRAG_IPV6 | \
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ETH_RSS_NONFRAG_IPV6_TCP | \
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ETH_RSS_NONFRAG_IPV6_UDP | \
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ETH_RSS_IPV6_EX | \
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ETH_RSS_IPV6_TCP_EX | \
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ETH_RSS_IPV6_UDP_EX)
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enum rq_completion_fmt {
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RQ_COMPLETE_SGE = 1
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};
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struct hinic_rq_ctrl {
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u32 ctrl_fmt;
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};
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struct hinic_rq_cqe {
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u32 status;
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u32 vlan_len;
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u32 offload_type;
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u32 rss_hash;
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u32 rsvd[4];
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#if defined(RTE_ARCH_ARM64)
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} __rte_cache_aligned;
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#else
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};
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#endif
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struct hinic_rq_cqe_sect {
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struct hinic_sge sge;
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u32 rsvd;
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};
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struct hinic_rq_bufdesc {
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u32 addr_high;
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u32 addr_low;
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};
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struct hinic_rq_wqe {
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struct hinic_rq_ctrl ctrl;
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u32 rsvd;
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struct hinic_rq_cqe_sect cqe_sect;
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struct hinic_rq_bufdesc buf_desc;
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};
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struct hinic_rxq_stats {
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u64 packets;
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u64 bytes;
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u64 rx_nombuf;
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u64 errors;
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u64 rx_discards;
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u64 burst_pkts;
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};
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/* Attention, Do not add any member in hinic_rx_info
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* as rxq bulk rearm mode will write mbuf in rx_info
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*/
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struct hinic_rx_info {
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struct rte_mbuf *mbuf;
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};
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struct hinic_rxq {
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struct hinic_wq *wq;
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volatile u16 *pi_virt_addr;
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u16 port_id;
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u16 q_id;
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u16 q_depth;
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u16 buf_len;
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u16 rx_free_thresh;
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u16 rxinfo_align_end;
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u32 socket_id;
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unsigned long status;
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struct hinic_rxq_stats rxq_stats;
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struct hinic_nic_dev *nic_dev;
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struct hinic_rx_info *rx_info;
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volatile struct hinic_rq_cqe *rx_cqe;
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dma_addr_t cqe_start_paddr;
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void *cqe_start_vaddr;
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struct rte_mempool *mb_pool;
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};
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int hinic_setup_rx_resources(struct hinic_rxq *rxq);
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void hinic_free_all_rx_resources(struct rte_eth_dev *eth_dev);
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void hinic_free_all_rx_mbuf(struct rte_eth_dev *eth_dev);
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void hinic_free_rx_resources(struct hinic_rxq *rxq);
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u16 hinic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, u16 nb_pkts);
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void hinic_free_all_rx_mbufs(struct hinic_rxq *rxq);
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void hinic_rx_alloc_pkts(struct hinic_rxq *rxq);
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void hinic_rxq_get_stats(struct hinic_rxq *rxq, struct hinic_rxq_stats *stats);
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void hinic_rxq_stats_reset(struct hinic_rxq *rxq);
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int hinic_config_mq_mode(struct rte_eth_dev *dev, bool on);
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int hinic_rx_configure(struct rte_eth_dev *dev);
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void hinic_rx_remove_configure(struct rte_eth_dev *dev);
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void hinic_get_func_rx_buf_size(struct hinic_nic_dev *nic_dev);
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int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id,
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u16 rq_depth, unsigned int socket_id);
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void hinic_destroy_rq(struct hinic_hwdev *hwdev, u16 q_id);
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#endif /* _HINIC_PMD_RX_H_ */
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