450f079131
1. Abstract
For packet processing workloads such as DPDK polling is continuous.
This means CPU cores always show 100% busy independent of how much work
those cores are doing. It is critical to accurately determine how busy
a core is hugely important for the following reasons:
* No indication of overload conditions.
* User does not know how much real load is on a system, resulting
in wasted energy as no power management is utilized.
Compared to the original l3fwd-power design, instead of going to sleep
after detecting an empty poll, the new mechanism just lowers the core
frequency. As a result, the application does not stop polling the device,
which leads to improved handling of bursts of traffic.
When the system become busy, the empty poll mechanism can also increase the
core frequency (including turbo) to do best effort for intensive traffic.
This gives us more flexible and balanced traffic awareness over the
standard l3fwd-power application.
2. Proposed solution
The proposed solution focuses on how many times empty polls are executed.
The less the number of empty polls, means current core is busy with
processing workload, therefore, the higher frequency is needed. The high
empty poll number indicates the current core not doing any real work
therefore, we can lower the frequency to safe power.
In the current implementation, each core has 1 empty-poll counter which
assume 1 core is dedicated to 1 queue. This will need to be expanded in the
future to support multiple queues per core.
2.1 Power state definition:
LOW: Not currently used, reserved for future use.
MED: the frequency is used to process modest traffic workload.
HIGH: the frequency is used to process busy traffic workload.
2.2 There are two phases to establish the power management system:
a.Initialization/Training phase. The training phase is necessary
in order to figure out the system polling baseline numbers from
idle to busy. The highest poll count will be during idle, where
all polls are empty. These poll counts will be different between
systems due to the many possible processor micro-arch, cache
and device configurations, hence the training phase.
In the training phase, traffic is blocked so the training
algorithm can average the empty-poll numbers for the LOW, MED and
HIGH power states in order to create a baseline.
The core's counter are collected every 10ms, and the Training
phase will take 2 seconds.
Training is disabled as default configuration. The default
parameter is applied. Sample App still can trigger training
if that's needed. Once the training phase has been executed once on
a system, the application can then be started with the relevant
thresholds provided on the command line, allowing the application
to start passing start traffic immediately
b.Normal phase. Traffic starts immediately based on the default
thresholds, or based on the user supplied thresholds via the
command line parameters. The run-time poll counts are compared with
the baseline and the decision will be taken to move to MED power
state or HIGH power state. The counters are calculated every 10ms.
3. Proposed API
1. rte_power_empty_poll_stat_init(struct ep_params **eptr,
uint8_t *freq_tlb, struct ep_policy *policy);
which is used to initialize the power management system.
2. rte_power_empty_poll_stat_free(void);
which is used to free the resource hold by power management system.
3. rte_power_empty_poll_stat_update(unsigned int lcore_id);
which is used to update specific core empty poll counter, not thread safe
4. rte_power_poll_stat_update(unsigned int lcore_id, uint8_t nb_pkt);
which is used to update specific core valid poll counter, not thread safe
5. rte_power_empty_poll_stat_fetch(unsigned int lcore_id);
which is used to get specific core empty poll counter.
6. rte_power_poll_stat_fetch(unsigned int lcore_id);
which is used to get specific core valid poll counter.
7. rte_empty_poll_detection(struct rte_timer *tim, void *arg);
which is used to detect empty poll state changes then take action.
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Reviewed-by: Lei Yao <lei.a.yao@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
224 lines
4.1 KiB
C
224 lines
4.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2018 Intel Corporation
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*/
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#ifndef _RTE_EMPTY_POLL_H
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#define _RTE_EMPTY_POLL_H
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/**
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* @file
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* RTE Power Management
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <rte_common.h>
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#include <rte_byteorder.h>
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#include <rte_log.h>
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#include <rte_string_fns.h>
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#include <rte_power.h>
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#include <rte_timer.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define NUM_FREQS RTE_MAX_LCORE_FREQS
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#define BINS_AV 4 /* Has to be ^2 */
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#define DROP (NUM_DIRECTIONS * NUM_DEVICES)
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#define NUM_PRIORITIES 2
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#define NUM_NODES 256 /* Max core number*/
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/* Processor Power State */
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enum freq_val {
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LOW,
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MED,
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HGH,
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NUM_FREQ = NUM_FREQS
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};
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/* Queue Polling State */
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enum queue_state {
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TRAINING, /* NO TRAFFIC */
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MED_NORMAL, /* MED */
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HGH_BUSY, /* HIGH */
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LOW_PURGE, /* LOW */
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};
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/* Queue Stats */
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struct freq_threshold {
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uint64_t base_edpi;
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bool trained;
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uint32_t threshold_percent;
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uint32_t cur_train_iter;
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};
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/* Each Worder Thread Empty Poll Stats */
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struct priority_worker {
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/* Current dequeue and throughput counts */
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/* These 2 are written to by the worker threads */
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/* So keep them on their own cache line */
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uint64_t empty_dequeues;
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uint64_t num_dequeue_pkts;
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enum queue_state queue_state;
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uint64_t empty_dequeues_prev;
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uint64_t num_dequeue_pkts_prev;
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/* Used for training only */
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struct freq_threshold thresh[NUM_FREQ];
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enum freq_val cur_freq;
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/* bucket arrays to calculate the averages */
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/* edpi mean empty poll counter difference per interval */
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uint64_t edpi_av[BINS_AV];
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/* empty poll counter */
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uint32_t ec;
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/* ppi mean valid poll counter per interval */
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uint64_t ppi_av[BINS_AV];
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/* valid poll counter */
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uint32_t pc;
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uint32_t lcore_id;
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uint32_t iter_counter;
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uint32_t threshold_ctr;
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uint32_t display_ctr;
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uint8_t dev_id;
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} __rte_cache_aligned;
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struct stats_data {
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struct priority_worker wrk_stats[NUM_NODES];
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/* flag to stop rx threads processing packets until training over */
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bool start_rx;
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};
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/* Empty Poll Parameters */
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struct ep_params {
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/* Timer related stuff */
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uint64_t interval_ticks;
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uint32_t max_train_iter;
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struct rte_timer timer0;
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struct stats_data wrk_data;
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};
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/* Sample App Init information */
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struct ep_policy {
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uint64_t med_base_edpi;
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uint64_t hgh_base_edpi;
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enum queue_state state;
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};
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/**
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* Initialize the power management system.
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*
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* @param eptr
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* the structure of empty poll configuration
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* @param freq_tlb
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* the power state/frequency mapping table
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* @param policy
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* the initialization policy from sample app
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*
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* @return
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* - 0 on success.
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* - Negative on error.
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*/
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int __rte_experimental
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rte_power_empty_poll_stat_init(struct ep_params **eptr, uint8_t *freq_tlb,
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struct ep_policy *policy);
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/**
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* Free the resource hold by power management system.
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*/
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void __rte_experimental
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rte_power_empty_poll_stat_free(void);
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/**
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* Update specific core empty poll counter
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* It's not thread safe.
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*
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* @param lcore_id
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* lcore id
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*
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* @return
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* - 0 on success.
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* - Negative on error.
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*/
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int __rte_experimental
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rte_power_empty_poll_stat_update(unsigned int lcore_id);
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/**
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* Update specific core valid poll counter, not thread safe.
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*
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* @param lcore_id
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* lcore id.
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* @param nb_pkt
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* The packet number of one valid poll.
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*
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* @return
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* - 0 on success.
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* - Negative on error.
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*/
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int __rte_experimental
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rte_power_poll_stat_update(unsigned int lcore_id, uint8_t nb_pkt);
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/**
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* Fetch specific core empty poll counter.
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*
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* @param lcore_id
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* lcore id
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*
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* @return
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* Current lcore empty poll counter value.
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*/
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uint64_t __rte_experimental
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rte_power_empty_poll_stat_fetch(unsigned int lcore_id);
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/**
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* Fetch specific core valid poll counter.
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*
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* @param lcore_id
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* lcore id
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*
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* @return
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* Current lcore valid poll counter value.
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*/
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uint64_t __rte_experimental
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rte_power_poll_stat_fetch(unsigned int lcore_id);
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/**
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* Empty poll state change detection function
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*
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* @param tim
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* The timer structure
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* @param arg
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* The customized parameter
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*/
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void __rte_experimental
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rte_empty_poll_detection(struct rte_timer *tim, void *arg);
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#ifdef __cplusplus
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}
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#endif
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#endif
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