e9b9739264
RTE_ARCH_xx flags are used to distinguish platform architectures.
These flags can be used to pick different code paths for different
architectures at compile time.
For Arm platforms, there are 3 flags in use: RTE_ARCH_ARM,
RTE_ARCH_ARMv7 and RTE_ARCH_ARM64.
RTE_ARCH_ARM64 is for 64-bit aarch64 platforms,
and RTE_ARCH_ARM & RTE_ARCH_ARMv7 are for 32-bit platforms.
RTE_ARCH_ARMv7 is for ARMv7 platforms as its name suggested.
The issue is meaning of RTE_ARCH_ARM is not clear enough.
Because no info about platform word length is included in the name.
To make the flag names more clear, a naming scheme is proposed.
RTE_ARCH_ARM (all Arm platforms)
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+----RTE_ARCH_32 (New. 32-bit platforms of all architectures)
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| +----RTE_ARCH_ARMv7 (ARMv7 platforms)
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| +----RTE_ARCH_ARMv8_AARCH32 (aarch32 state on aarch64 machine)
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+----RTE_ARCH_64 (64-bit platforms of all architectures)
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+----RTE_ARCH_ARM64 (64-bit Arm platforms)
RTE_ARCH_32 will be explicitly defined for 32-bit platforms.
To fit into the new naming scheme, current usage of RTE_ARCH_ARM in
project is mapped to (RTE_ARCH_ARM && RTE_ARCH_32).
Matching flags for other architectures are:
RTE_ARCH_X86
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+----RTE_ARCH_32
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| +----RTE_ARCH_I686
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| +----RTE_ARCH_X86_X32
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+----RTE_ARCH_64
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+----RTE_ARCH_X86_64
RTE_ARCH_PPC_64 ---- RTE_ARCH_64
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2015 Cavium, Inc
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*/
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#ifndef _TEST_XMMT_OPS_H_
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#define _TEST_XMMT_OPS_H_
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#include <rte_vect.h>
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#if defined(RTE_ARCH_ARM)
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/* vect_* abstraction implementation using NEON */
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/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
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#define vect_loadu_sil128(p) vld1q_s32((const int32_t *)p)
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/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
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static __rte_always_inline xmm_t
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vect_set_epi32(int i3, int i2, int i1, int i0)
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{
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int32_t data[4] = {i0, i1, i2, i3};
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return vld1q_s32(data);
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}
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#elif defined(RTE_ARCH_X86)
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/* vect_* abstraction implementation using SSE */
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/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
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#define vect_loadu_sil128(p) _mm_loadu_si128(p)
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/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
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#define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)
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#elif defined(RTE_ARCH_PPC_64)
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/* vect_* abstraction implementation using ALTIVEC */
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/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
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#define vect_loadu_sil128(p) vec_ld(0, p)
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/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
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static __rte_always_inline xmm_t
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vect_set_epi32(int i3, int i2, int i1, int i0)
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{
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xmm_t data = (xmm_t){i0, i1, i2, i3};
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return data;
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}
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#endif
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#endif /* _TEST_XMMT_OPS_H_ */
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