18f02ff759
Since commit 10ed994
(pci: use igb_uio mapping only when needed),
the flag RTE_PCI_DRV_NEED_IGB_UIO must be set even if RTE_EAL_UNBIND_PORTS
is disabled.
It was not the case for virtio_uio and vmxnet3_uio so the uio resources were
not mapped when RTE_EAL_UNBIND_PORTS was not defined.
Specifically, pci_uio_map_resource() was not called so
pci_dev->mem_resource was not mapped.
Signed-off-by: Daniel Kan <dan@nyansa.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
766 lines
23 KiB
C
766 lines
23 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/queue.h>
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#include <stdio.h>
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#include <errno.h>
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#include <stdint.h>
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#include <string.h>
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#include <unistd.h>
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#include <stdarg.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <rte_byteorder.h>
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#include <rte_common.h>
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#include <rte_cycles.h>
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#include <rte_interrupts.h>
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#include <rte_log.h>
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#include <rte_debug.h>
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#include <rte_pci.h>
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#include <rte_atomic.h>
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#include <rte_branch_prediction.h>
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#include <rte_memory.h>
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#include <rte_memzone.h>
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#include <rte_tailq.h>
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#include <rte_eal.h>
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#include <rte_alarm.h>
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#include <rte_ether.h>
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#include <rte_ethdev.h>
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#include <rte_atomic.h>
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#include <rte_string_fns.h>
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#include <rte_malloc.h>
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#include "vmxnet3/vmxnet3_defs.h"
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#include "vmxnet3_ring.h"
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#include "vmxnet3_logs.h"
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#include "vmxnet3_ethdev.h"
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#define PROCESS_SYS_EVENTS 0
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static int eth_vmxnet3_dev_init(struct eth_driver *eth_drv,
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struct rte_eth_dev *eth_dev);
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static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
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static int vmxnet3_dev_start(struct rte_eth_dev *dev);
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static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
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static void vmxnet3_dev_close(struct rte_eth_dev *dev);
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static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
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static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
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static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
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static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
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static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
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static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
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int wait_to_complete);
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static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
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struct rte_eth_stats *stats);
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static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
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struct rte_eth_dev_info *dev_info);
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#if PROCESS_SYS_EVENTS == 1
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static void vmxnet3_process_events(struct vmxnet3_hw *);
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#endif
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/*
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* The set of PCI devices this driver supports
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*/
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static struct rte_pci_id pci_id_vmxnet3_map[] = {
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#define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#include "rte_pci_dev_ids.h"
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{ .vendor_id = 0, /* sentinel */ },
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};
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static struct eth_dev_ops vmxnet3_eth_dev_ops = {
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.dev_configure = vmxnet3_dev_configure,
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.dev_start = vmxnet3_dev_start,
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.dev_stop = vmxnet3_dev_stop,
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.dev_close = vmxnet3_dev_close,
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.promiscuous_enable = vmxnet3_dev_promiscuous_enable,
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.promiscuous_disable = vmxnet3_dev_promiscuous_disable,
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.allmulticast_enable = vmxnet3_dev_allmulticast_enable,
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.allmulticast_disable = vmxnet3_dev_allmulticast_disable,
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.link_update = vmxnet3_dev_link_update,
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.stats_get = vmxnet3_dev_stats_get,
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.dev_infos_get = vmxnet3_dev_info_get,
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.rx_queue_setup = vmxnet3_dev_rx_queue_setup,
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.rx_queue_release = vmxnet3_dev_rx_queue_release,
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.tx_queue_setup = vmxnet3_dev_tx_queue_setup,
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.tx_queue_release = vmxnet3_dev_tx_queue_release,
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};
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static const struct rte_memzone *
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gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
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const char *post_string, int socket_id, uint16_t align)
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{
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char z_name[RTE_MEMZONE_NAMESIZE];
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const struct rte_memzone *mz;
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rte_snprintf(z_name, sizeof(z_name), "%s_%d_%s",
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dev->driver->pci_drv.name, dev->data->port_id, post_string);
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mz = rte_memzone_lookup(z_name);
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if (mz)
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return mz;
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return rte_memzone_reserve_aligned(z_name, size,
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socket_id, 0, align);
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}
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/**
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* Atomically reads the link status information from global
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* structure rte_eth_dev.
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*
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* @param dev
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* - Pointer to the structure rte_eth_dev to read from.
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* - Pointer to the buffer to be saved with the link status.
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*
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* @return
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* - On success, zero.
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* - On failure, negative value.
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*/
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static inline int
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rte_vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
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struct rte_eth_link *link)
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{
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struct rte_eth_link *dst = &(dev->data->dev_link);
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struct rte_eth_link *src = link;
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if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
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*(uint64_t *)src) == 0)
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return -1;
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return 0;
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}
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/*
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* This function is based on vmxnet3_disable_intr()
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*/
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static void
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vmxnet3_disable_intr(struct vmxnet3_hw *hw)
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{
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int i;
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PMD_INIT_FUNC_TRACE();
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hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
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for (i = 0; i < VMXNET3_MAX_INTRS; i++)
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VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
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}
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/*
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* It returns 0 on success.
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*/
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static int
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eth_vmxnet3_dev_init(__attribute__((unused)) struct eth_driver *eth_drv,
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struct rte_eth_dev *eth_dev)
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{
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struct rte_pci_device *pci_dev;
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struct vmxnet3_hw *hw =
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VMXNET3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
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uint32_t mac_hi, mac_lo, ver;
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PMD_INIT_FUNC_TRACE();
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eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
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eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
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eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
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pci_dev = eth_dev->pci_dev;
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/*
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* for secondary processes, we don't initialise any further as primary
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* has already done this work.
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*/
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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/* Vendor and Device ID need to be set before init of shared code */
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hw->device_id = pci_dev->id.device_id;
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hw->vendor_id = pci_dev->id.vendor_id;
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hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
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hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
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hw->num_rx_queues = 1;
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hw->num_tx_queues = 1;
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hw->cur_mtu = ETHER_MTU;
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hw->bufs_per_pkt = 1;
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/* Check h/w version compatibility with driver. */
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ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
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PMD_INIT_LOG(DEBUG, "Harware version : %d\n", ver);
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if (ver & 0x1)
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VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
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else {
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PMD_INIT_LOG(ERR, "Uncompatiable h/w version, should be 0x1\n");
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return -EIO;
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}
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/* Check UPT version compatibility with driver. */
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ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
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PMD_INIT_LOG(DEBUG, "UPT harware version : %d\n", ver);
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if (ver & 0x1)
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VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
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else {
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PMD_INIT_LOG(ERR, "Incompatiable UPT version.\n");
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return -EIO;
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}
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/* Getting MAC Address */
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mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
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mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
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memcpy(hw->perm_addr , &mac_lo, 4);
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memcpy(hw->perm_addr+4, &mac_hi, 2);
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/* Allocate memory for storing MAC addresses */
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eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
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VMXNET3_MAX_MAC_ADDRS, 0);
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if (eth_dev->data->mac_addrs == NULL) {
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PMD_INIT_LOG(ERR,
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"Failed to allocate %d bytes needed to store MAC addresses",
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ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
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return -ENOMEM;
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}
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/* Copy the permanent MAC address */
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ether_addr_copy((struct ether_addr *) hw->perm_addr,
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ð_dev->data->mac_addrs[0]);
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PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x \n",
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hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
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hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
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/* Put device in Quiesce Mode */
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VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
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return 0;
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}
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static struct eth_driver rte_vmxnet3_pmd = {
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{
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.name = "rte_vmxnet3_pmd",
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.id_table = pci_id_vmxnet3_map,
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.drv_flags = RTE_PCI_DRV_NEED_IGB_UIO,
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},
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.eth_dev_init = eth_vmxnet3_dev_init,
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.dev_private_size = sizeof(struct vmxnet3_adapter),
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};
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/*
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* Driver initialization routine.
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* Invoked once at EAL init time.
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* Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
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*/
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int
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rte_vmxnet3_pmd_init(void)
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{
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PMD_INIT_FUNC_TRACE();
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rte_eth_driver_register(&rte_vmxnet3_pmd);
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return 0;
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}
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static int
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vmxnet3_dev_configure(struct rte_eth_dev *dev)
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{
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const struct rte_memzone *mz;
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struct vmxnet3_hw *hw =
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VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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size_t size;
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PMD_INIT_FUNC_TRACE();
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if (dev->data->nb_rx_queues > UINT8_MAX ||
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dev->data->nb_tx_queues > UINT8_MAX)
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return (-EINVAL);
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size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
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dev->data->nb_tx_queues * sizeof (struct Vmxnet3_RxQueueDesc);
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if (size > UINT16_MAX)
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return (-EINVAL);
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hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
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hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
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/*
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* Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
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* on current socket
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*/
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mz = gpa_zone_reserve(dev, sizeof (struct Vmxnet3_DriverShared),
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"shared", rte_socket_id(), 8);
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if (mz == NULL) {
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PMD_INIT_LOG(ERR, "ERROR: Creating shared zone\n");
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return (-ENOMEM);
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}
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memset(mz->addr, 0, mz->len);
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hw->shared = mz->addr;
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hw->sharedPA = mz->phys_addr;
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/*
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* Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
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* on current socket
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*/
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mz = gpa_zone_reserve(dev, size, "queuedesc",
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rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
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if (mz == NULL) {
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PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone\n");
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return (-ENOMEM);
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}
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memset(mz->addr, 0, mz->len);
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hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
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hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
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hw->queueDescPA = mz->phys_addr;
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hw->queue_desc_len = (uint16_t)size;
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if(dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
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/* Allocate memory structure for UPT1_RSSConf and configure */
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mz = gpa_zone_reserve(dev, sizeof (struct VMXNET3_RSSConf), "rss_conf",
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rte_socket_id(), CACHE_LINE_SIZE);
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if (mz == NULL) {
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PMD_INIT_LOG(ERR, "ERROR: Creating rss_conf structure zone\n");
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return (-ENOMEM);
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}
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memset(mz->addr, 0, mz->len);
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hw->rss_conf = mz->addr;
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hw->rss_confPA = mz->phys_addr;
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}
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return 0;
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}
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static int
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vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
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{
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struct rte_eth_conf port_conf = dev->data->dev_conf;
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struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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Vmxnet3_DriverShared *shared = hw->shared;
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Vmxnet3_DSDevRead *devRead = &shared->devRead;
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uint32_t *mac_ptr;
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uint32_t val, i;
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int ret;
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shared->magic = VMXNET3_REV1_MAGIC;
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devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
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/* Setting up Guest OS information */
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devRead->misc.driverInfo.gos.gosBits = sizeof(void *) == 4 ?
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VMXNET3_GOS_BITS_32 :
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VMXNET3_GOS_BITS_64;
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devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
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devRead->misc.driverInfo.vmxnet3RevSpt = 1;
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devRead->misc.driverInfo.uptVerSpt = 1;
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devRead->misc.queueDescPA = hw->queueDescPA;
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devRead->misc.queueDescLen = hw->queue_desc_len;
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devRead->misc.mtu = hw->cur_mtu;
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devRead->misc.numTxQueues = hw->num_tx_queues;
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devRead->misc.numRxQueues = hw->num_rx_queues;
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/*
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* Set number of interrupts to 1
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* PMD disables all the interrupts but this is MUST to activate device
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* It needs at least one interrupt for link events to handle
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* So we'll disable it later after device activation if needed
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*/
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devRead->intrConf.numIntrs = 1;
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devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
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for (i = 0; i < hw->num_tx_queues; i++) {
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Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
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vmxnet3_tx_queue_t *txq = dev->data->tx_queues[i];
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tqd->ctrl.txNumDeferred = 0;
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tqd->ctrl.txThreshold = 1;
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tqd->conf.txRingBasePA = txq->cmd_ring.basePA;
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tqd->conf.compRingBasePA = txq->comp_ring.basePA;
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tqd->conf.txRingSize = txq->cmd_ring.size;
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tqd->conf.compRingSize = txq->comp_ring.size;
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tqd->conf.intrIdx = txq->comp_ring.intr_idx;
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tqd->status.stopped = TRUE;
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tqd->status.error = 0;
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memset(&tqd->stats, 0, sizeof(tqd->stats));
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}
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for (i = 0; i < hw->num_rx_queues; i++) {
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Vmxnet3_RxQueueDesc *rqd = &hw->rqd_start[i];
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vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
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rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
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rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
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rqd->conf.compRingBasePA = rxq->comp_ring.basePA;
|
|
|
|
rqd->conf.rxRingSize[0] = rxq->cmd_ring[0].size;
|
|
rqd->conf.rxRingSize[1] = rxq->cmd_ring[1].size;
|
|
rqd->conf.compRingSize = rxq->comp_ring.size;
|
|
rqd->conf.intrIdx = rxq->comp_ring.intr_idx;
|
|
rqd->status.stopped = TRUE;
|
|
rqd->status.error = 0;
|
|
memset(&rqd->stats, 0, sizeof(rqd->stats));
|
|
}
|
|
|
|
/* RxMode set to 0 of VMXNET3_RXM_xxx */
|
|
devRead->rxFilterConf.rxMode = 0;
|
|
|
|
/* Setting up feature flags */
|
|
if(dev->data->dev_conf.rxmode.hw_ip_checksum) {
|
|
devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
|
|
}
|
|
|
|
if(dev->data->dev_conf.rxmode.hw_vlan_strip) {
|
|
devRead->misc.uptFeatures |= VMXNET3_F_RXVLAN;
|
|
}
|
|
|
|
if(port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
|
|
ret = vmxnet3_rss_configure(dev);
|
|
if(ret != VMXNET3_SUCCESS) {
|
|
return ret;
|
|
}
|
|
devRead->misc.uptFeatures |= VMXNET3_F_RSS;
|
|
devRead->rssConfDesc.confVer = 1;
|
|
devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
|
|
devRead->rssConfDesc.confPA = hw->rss_confPA;
|
|
}
|
|
|
|
if(dev->data->dev_conf.rxmode.hw_vlan_filter) {
|
|
ret = vmxnet3_vlan_configure(dev);
|
|
if(ret != VMXNET3_SUCCESS) {
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
PMD_INIT_LOG(DEBUG, "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x \n",
|
|
hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
|
|
hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
|
|
|
|
/* Write MAC Address back to device */
|
|
mac_ptr = (uint32_t *)hw->perm_addr;
|
|
val = *mac_ptr;
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
|
|
|
|
val = (hw->perm_addr[5] << 8) | hw->perm_addr[4];
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
|
|
|
|
return VMXNET3_SUCCESS;
|
|
}
|
|
|
|
/*
|
|
* Configure device link speed and setup link.
|
|
* Must be called after eth_vmxnet3_dev_init. Other wise it might fail
|
|
* It returns 0 on success.
|
|
*/
|
|
static int
|
|
vmxnet3_dev_start(struct rte_eth_dev *dev)
|
|
{
|
|
int status, ret;
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
ret = vmxnet3_setup_driver_shared(dev);
|
|
if(ret != VMXNET3_SUCCESS) {
|
|
return ret;
|
|
}
|
|
|
|
/* Exchange shared data with device */
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
|
|
hw->sharedPA));
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
|
|
hw->sharedPA));
|
|
|
|
/* Activate device by register write */
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
|
|
status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
|
|
|
|
if (status != 0) {
|
|
PMD_INIT_LOG(ERR, "Device activation in %s(): UNSUCCESSFUL\n", __func__);
|
|
return -1;
|
|
}
|
|
|
|
/* Disable interrupts */
|
|
vmxnet3_disable_intr(hw);
|
|
|
|
/*
|
|
* Load RX queues with blank mbufs and update next2fill index for device
|
|
* Update RxMode of the device
|
|
*/
|
|
ret = vmxnet3_dev_rxtx_init(dev);
|
|
if(ret != VMXNET3_SUCCESS) {
|
|
PMD_INIT_LOG(ERR, "Device receive init in %s: UNSUCCESSFUL\n", __func__);
|
|
return ret;
|
|
}
|
|
|
|
/* Setting proper Rx Mode and issue Rx Mode Update command */
|
|
vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_ALL_MULTI, 1);
|
|
|
|
/*
|
|
* Don't need to handle events for now
|
|
*/
|
|
#if PROCESS_SYS_EVENTS == 1
|
|
events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
|
|
PMD_INIT_LOG(DEBUG, "Reading events: 0x%X\n\n", events);
|
|
vmxnet3_process_events(hw);
|
|
#endif
|
|
return status;
|
|
}
|
|
|
|
/*
|
|
* Stop device: disable rx and tx functions to allow for reconfiguring.
|
|
*/
|
|
static void
|
|
vmxnet3_dev_stop(struct rte_eth_dev *dev)
|
|
{
|
|
struct rte_eth_link link;
|
|
struct vmxnet3_hw *hw =
|
|
VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
if(hw->adapter_stopped == TRUE) {
|
|
PMD_INIT_LOG(DEBUG, "Device already closed.\n");
|
|
return;
|
|
}
|
|
|
|
/* disable interrupts */
|
|
vmxnet3_disable_intr(hw);
|
|
|
|
/* quiesce the device first */
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
|
|
|
|
/* reset the device */
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
|
|
PMD_INIT_LOG(DEBUG, "Device reset.\n");
|
|
hw->adapter_stopped = FALSE;
|
|
|
|
vmxnet3_dev_clear_queues(dev);
|
|
|
|
/* Clear recorded link status */
|
|
memset(&link, 0, sizeof(link));
|
|
rte_vmxnet3_dev_atomic_write_link_status(dev, &link);
|
|
}
|
|
|
|
/*
|
|
* Reset and stop device.
|
|
*/
|
|
static void
|
|
vmxnet3_dev_close(struct rte_eth_dev *dev)
|
|
{
|
|
struct vmxnet3_hw *hw =
|
|
VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
|
|
PMD_INIT_FUNC_TRACE();
|
|
|
|
vmxnet3_dev_stop(dev);
|
|
hw->adapter_stopped = TRUE;
|
|
|
|
}
|
|
|
|
static void
|
|
vmxnet3_dev_stats_get( struct rte_eth_dev *dev, struct rte_eth_stats *stats)
|
|
{
|
|
unsigned int i;
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
|
|
|
|
stats->opackets = 0;
|
|
stats->obytes = 0;
|
|
stats->oerrors = 0;
|
|
stats->ipackets = 0;
|
|
stats->ibytes = 0;
|
|
stats->rx_nombuf = 0;
|
|
stats->ierrors = 0;
|
|
stats->imcasts = 0;
|
|
stats->fdirmatch = 0;
|
|
stats->fdirmiss = 0;
|
|
|
|
for (i = 0; i < hw->num_tx_queues; i++) {
|
|
stats->opackets += hw->tqd_start[i].stats.ucastPktsTxOK +
|
|
hw->tqd_start[i].stats.mcastPktsTxOK +
|
|
hw->tqd_start[i].stats.bcastPktsTxOK;
|
|
stats->obytes += hw->tqd_start[i].stats.ucastBytesTxOK +
|
|
hw->tqd_start[i].stats.mcastBytesTxOK +
|
|
hw->tqd_start[i].stats.bcastBytesTxOK;
|
|
stats->oerrors += hw->tqd_start[i].stats.pktsTxError +
|
|
hw->tqd_start[i].stats.pktsTxDiscard;
|
|
}
|
|
|
|
for (i = 0; i < hw->num_rx_queues; i++) {
|
|
stats->ipackets += hw->rqd_start[i].stats.ucastPktsRxOK +
|
|
hw->rqd_start[i].stats.mcastPktsRxOK +
|
|
hw->rqd_start[i].stats.bcastPktsRxOK;
|
|
stats->ibytes += hw->rqd_start[i].stats.ucastBytesRxOK +
|
|
hw->rqd_start[i].stats.mcastBytesRxOK +
|
|
hw->rqd_start[i].stats.bcastBytesRxOK;
|
|
stats->rx_nombuf += hw->rqd_start[i].stats.pktsRxOutOfBuf;
|
|
stats->ierrors += hw->rqd_start[i].stats.pktsRxError;
|
|
}
|
|
|
|
}
|
|
|
|
static void
|
|
vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
|
|
{
|
|
dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
|
|
dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
|
|
dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
|
|
dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
|
|
dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
|
|
}
|
|
|
|
/* return 0 means link status changed, -1 means not changed */
|
|
static int
|
|
vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
|
|
{
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
struct rte_eth_link link;
|
|
uint32_t ret;
|
|
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
|
|
ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
|
|
|
|
if (!ret) {
|
|
PMD_INIT_LOG(ERR, "Link Status Negative : %s()\n", __func__);
|
|
return -1;
|
|
}
|
|
|
|
if (ret & 0x1) {
|
|
link.link_status = 1;
|
|
link.link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
link.link_speed = ETH_LINK_SPEED_10000;
|
|
|
|
rte_vmxnet3_dev_atomic_write_link_status(dev, &link);
|
|
|
|
return 0;
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
/* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
|
|
static void
|
|
vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
|
|
|
|
struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
|
|
if(set)
|
|
rxConf->rxMode = rxConf->rxMode | feature;
|
|
else
|
|
rxConf->rxMode = rxConf->rxMode & (~feature);
|
|
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
|
|
}
|
|
|
|
/* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
|
|
static void
|
|
vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
|
|
{
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
|
|
}
|
|
|
|
/* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
|
|
static void
|
|
vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
|
|
{
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
|
|
}
|
|
|
|
/* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
|
|
static void
|
|
vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
|
|
{
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
|
|
}
|
|
|
|
/* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
|
|
static void
|
|
vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
|
|
{
|
|
struct vmxnet3_hw *hw = VMXNET3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
|
vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
|
|
}
|
|
|
|
#if PROCESS_SYS_EVENTS == 1
|
|
static void
|
|
vmxnet3_process_events(struct vmxnet3_hw *hw)
|
|
{
|
|
uint32_t events = hw->shared->ecr;
|
|
if (!events){
|
|
PMD_INIT_LOG(ERR, "No events to process in %s()\n", __func__);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* ECR bits when written with 1b are cleared. Hence write
|
|
* events back to ECR so that the bits which were set will be reset.
|
|
*/
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
|
|
|
|
/* Check if link state has changed */
|
|
if (events & VMXNET3_ECR_LINK){
|
|
PMD_INIT_LOG(ERR, "Process events in %s(): VMXNET3_ECR_LINK event\n", __func__);
|
|
}
|
|
|
|
/* Check if there is an error on xmit/recv queues */
|
|
if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
|
|
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
|
|
|
|
if (hw->tqd_start->status.stopped)
|
|
PMD_INIT_LOG(ERR, "tq error 0x%x\n",
|
|
hw->tqd_start->status.error);
|
|
|
|
if (hw->rqd_start->status.stopped)
|
|
PMD_INIT_LOG(ERR, "rq error 0x%x\n",
|
|
hw->rqd_start->status.error);
|
|
|
|
/* Reset the device */
|
|
/* Have to reset the device */
|
|
}
|
|
|
|
if (events & VMXNET3_ECR_DIC)
|
|
PMD_INIT_LOG(ERR, "Device implementation change event.\n");
|
|
|
|
if (events & VMXNET3_ECR_DEBUG)
|
|
PMD_INIT_LOG(ERR, "Debug event generated by device.\n");
|
|
|
|
}
|
|
#endif
|