1acffa3929
Add burst enqueue and dequeue operations along with interface for symmetric request manager. Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
230 lines
4.4 KiB
C
230 lines
4.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include <rte_crypto.h>
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#include <rte_cryptodev.h>
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#include <rte_cycles.h>
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#include <rte_errno.h>
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#include "nitrox_sym_reqmgr.h"
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#include "nitrox_logs.h"
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#define PENDING_SIG 0xFFFFFFFFFFFFFFFFUL
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#define CMD_TIMEOUT 2
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union pkt_instr_hdr {
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uint64_t value;
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struct {
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#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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uint64_t raz_48_63 : 16;
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uint64_t g : 1;
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uint64_t gsz : 7;
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uint64_t ihi : 1;
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uint64_t ssz : 7;
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uint64_t raz_30_31 : 2;
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uint64_t fsz : 6;
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uint64_t raz_16_23 : 8;
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uint64_t tlen : 16;
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#else
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uint64_t tlen : 16;
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uint64_t raz_16_23 : 8;
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uint64_t fsz : 6;
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uint64_t raz_30_31 : 2;
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uint64_t ssz : 7;
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uint64_t ihi : 1;
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uint64_t gsz : 7;
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uint64_t g : 1;
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uint64_t raz_48_63 : 16;
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#endif
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} s;
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};
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union pkt_hdr {
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uint64_t value[2];
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struct {
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#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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uint64_t opcode : 8;
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uint64_t arg : 8;
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uint64_t ctxc : 2;
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uint64_t unca : 1;
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uint64_t raz_44 : 1;
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uint64_t info : 3;
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uint64_t destport : 9;
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uint64_t unc : 8;
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uint64_t raz_19_23 : 5;
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uint64_t grp : 3;
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uint64_t raz_15 : 1;
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uint64_t ctxl : 7;
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uint64_t uddl : 8;
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#else
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uint64_t uddl : 8;
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uint64_t ctxl : 7;
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uint64_t raz_15 : 1;
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uint64_t grp : 3;
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uint64_t raz_19_23 : 5;
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uint64_t unc : 8;
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uint64_t destport : 9;
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uint64_t info : 3;
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uint64_t raz_44 : 1;
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uint64_t unca : 1;
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uint64_t ctxc : 2;
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uint64_t arg : 8;
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uint64_t opcode : 8;
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#endif
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uint64_t ctxp;
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} s;
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};
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union slc_store_info {
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uint64_t value[2];
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struct {
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#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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uint64_t raz_39_63 : 25;
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uint64_t ssz : 7;
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uint64_t raz_0_31 : 32;
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#else
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uint64_t raz_0_31 : 32;
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uint64_t ssz : 7;
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uint64_t raz_39_63 : 25;
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#endif
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uint64_t rptr;
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} s;
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};
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struct nps_pkt_instr {
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uint64_t dptr0;
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union pkt_instr_hdr ih;
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union pkt_hdr irh;
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union slc_store_info slc;
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uint64_t fdata[2];
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};
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struct resp_hdr {
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uint64_t orh;
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uint64_t completion;
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};
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struct nitrox_softreq {
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struct nitrox_crypto_ctx *ctx;
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struct rte_crypto_op *op;
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struct nps_pkt_instr instr;
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struct resp_hdr resp;
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uint64_t timeout;
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rte_iova_t iova;
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};
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static void
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softreq_init(struct nitrox_softreq *sr, rte_iova_t iova)
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{
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memset(sr, 0, sizeof(*sr));
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sr->iova = iova;
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}
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static int
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process_cipher_auth_data(struct nitrox_softreq *sr)
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{
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RTE_SET_USED(sr);
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return 0;
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}
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static int
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process_softreq(struct nitrox_softreq *sr)
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{
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struct nitrox_crypto_ctx *ctx = sr->ctx;
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int err = 0;
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switch (ctx->nitrox_chain) {
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case NITROX_CHAIN_CIPHER_AUTH:
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case NITROX_CHAIN_AUTH_CIPHER:
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err = process_cipher_auth_data(sr);
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break;
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default:
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err = -EINVAL;
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break;
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}
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return err;
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}
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int
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nitrox_process_se_req(uint16_t qno, struct rte_crypto_op *op,
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struct nitrox_crypto_ctx *ctx,
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struct nitrox_softreq *sr)
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{
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RTE_SET_USED(qno);
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softreq_init(sr, sr->iova);
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sr->ctx = ctx;
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sr->op = op;
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process_softreq(sr);
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sr->timeout = rte_get_timer_cycles() + CMD_TIMEOUT * rte_get_timer_hz();
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return 0;
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}
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int
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nitrox_check_se_req(struct nitrox_softreq *sr, struct rte_crypto_op **op)
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{
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uint64_t cc;
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uint64_t orh;
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int err;
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cc = *(volatile uint64_t *)(&sr->resp.completion);
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orh = *(volatile uint64_t *)(&sr->resp.orh);
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if (cc != PENDING_SIG)
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err = 0;
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else if ((orh != PENDING_SIG) && (orh & 0xff))
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err = orh & 0xff;
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else if (rte_get_timer_cycles() >= sr->timeout)
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err = 0xff;
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else
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return -EAGAIN;
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if (unlikely(err))
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NITROX_LOG(ERR, "Request err 0x%x, orh 0x%"PRIx64"\n", err,
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sr->resp.orh);
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*op = sr->op;
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return err;
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}
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void *
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nitrox_sym_instr_addr(struct nitrox_softreq *sr)
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{
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return &sr->instr;
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}
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static void
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req_pool_obj_init(__rte_unused struct rte_mempool *mp,
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__rte_unused void *opaque, void *obj,
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__rte_unused unsigned int obj_idx)
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{
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softreq_init(obj, rte_mempool_virt2iova(obj));
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}
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struct rte_mempool *
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nitrox_sym_req_pool_create(struct rte_cryptodev *cdev, uint32_t nobjs,
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uint16_t qp_id, int socket_id)
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{
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char softreq_pool_name[RTE_RING_NAMESIZE];
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struct rte_mempool *mp;
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snprintf(softreq_pool_name, RTE_RING_NAMESIZE, "%s_sr_%d",
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cdev->data->name, qp_id);
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mp = rte_mempool_create(softreq_pool_name,
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RTE_ALIGN_MUL_CEIL(nobjs, 64),
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sizeof(struct nitrox_softreq),
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64, 0, NULL, NULL, req_pool_obj_init, NULL,
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socket_id, 0);
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if (unlikely(!mp))
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NITROX_LOG(ERR, "Failed to create req pool, qid %d, err %d\n",
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qp_id, rte_errno);
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return mp;
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}
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void
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nitrox_sym_req_pool_free(struct rte_mempool *mp)
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{
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rte_mempool_free(mp);
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}
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