f5862ae99e
API makes think that rte_cryptodev_info_get() cannot return a value >= 3 (RTE_CRYPTO_AEAD_LIST_END in 19.11). 20.02-rc1 was returning 3 (RTE_CRYPTO_AEAD_CHACHA20_POLY1305). So the ABI compatibility contract was broken. It could be solved with some function versioning, but because a lack of time, the feature is reverted for now. This reverts following commits: -6c9f3b347e
("cryptodev: add Chacha20-Poly1305 AEAD algorithm") -2c512e64d6
("crypto/qat: support Chacha Poly") -d55e01f579
("test/crypto: add Chacha Poly cases") Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
345 lines
9.5 KiB
C
345 lines
9.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2015-2018 Intel Corporation
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*/
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#include <rte_bus_pci.h>
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#include <rte_common.h>
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#include <rte_dev.h>
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#include <rte_malloc.h>
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#include <rte_pci.h>
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#include <rte_cryptodev_pmd.h>
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#include "qat_logs.h"
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#include "qat_sym.h"
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#include "qat_sym_session.h"
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#include "qat_sym_pmd.h"
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uint8_t cryptodev_qat_driver_id;
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static const struct rte_cryptodev_capabilities qat_gen1_sym_capabilities[] = {
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QAT_BASE_GEN1_SYM_CAPABILITIES,
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RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
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};
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static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {
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QAT_BASE_GEN1_SYM_CAPABILITIES,
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QAT_EXTRA_GEN2_SYM_CAPABILITIES,
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RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
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};
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static int qat_sym_qp_release(struct rte_cryptodev *dev,
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uint16_t queue_pair_id);
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static int qat_sym_dev_config(__rte_unused struct rte_cryptodev *dev,
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__rte_unused struct rte_cryptodev_config *config)
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{
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return 0;
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}
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static int qat_sym_dev_start(__rte_unused struct rte_cryptodev *dev)
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{
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return 0;
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}
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static void qat_sym_dev_stop(__rte_unused struct rte_cryptodev *dev)
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{
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return;
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}
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static int qat_sym_dev_close(struct rte_cryptodev *dev)
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{
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int i, ret;
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for (i = 0; i < dev->data->nb_queue_pairs; i++) {
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ret = qat_sym_qp_release(dev, i);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static void qat_sym_dev_info_get(struct rte_cryptodev *dev,
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struct rte_cryptodev_info *info)
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{
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struct qat_sym_dev_private *internals = dev->data->dev_private;
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const struct qat_qp_hw_data *sym_hw_qps =
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qat_gen_config[internals->qat_dev->qat_dev_gen]
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.qp_hw_data[QAT_SERVICE_SYMMETRIC];
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if (info != NULL) {
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info->max_nb_queue_pairs =
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qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);
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info->feature_flags = dev->feature_flags;
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info->capabilities = internals->qat_dev_capabilities;
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info->driver_id = cryptodev_qat_driver_id;
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/* No limit of number of sessions */
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info->sym.max_nb_sessions = 0;
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}
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}
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static void qat_sym_stats_get(struct rte_cryptodev *dev,
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struct rte_cryptodev_stats *stats)
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{
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struct qat_common_stats qat_stats = {0};
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struct qat_sym_dev_private *qat_priv;
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if (stats == NULL || dev == NULL) {
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QAT_LOG(ERR, "invalid ptr: stats %p, dev %p", stats, dev);
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return;
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}
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qat_priv = dev->data->dev_private;
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qat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_SYMMETRIC);
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stats->enqueued_count = qat_stats.enqueued_count;
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stats->dequeued_count = qat_stats.dequeued_count;
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stats->enqueue_err_count = qat_stats.enqueue_err_count;
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stats->dequeue_err_count = qat_stats.dequeue_err_count;
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}
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static void qat_sym_stats_reset(struct rte_cryptodev *dev)
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{
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struct qat_sym_dev_private *qat_priv;
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if (dev == NULL) {
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QAT_LOG(ERR, "invalid cryptodev ptr %p", dev);
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return;
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}
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qat_priv = dev->data->dev_private;
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qat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_SYMMETRIC);
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}
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static int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
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{
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struct qat_sym_dev_private *qat_private = dev->data->dev_private;
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QAT_LOG(DEBUG, "Release sym qp %u on device %d",
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queue_pair_id, dev->data->dev_id);
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qat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][queue_pair_id]
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= NULL;
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return qat_qp_release((struct qat_qp **)
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&(dev->data->queue_pairs[queue_pair_id]));
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}
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static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
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const struct rte_cryptodev_qp_conf *qp_conf,
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int socket_id)
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{
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struct qat_qp *qp;
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int ret = 0;
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uint32_t i;
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struct qat_qp_config qat_qp_conf;
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struct qat_qp **qp_addr =
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(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
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struct qat_sym_dev_private *qat_private = dev->data->dev_private;
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const struct qat_qp_hw_data *sym_hw_qps =
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qat_gen_config[qat_private->qat_dev->qat_dev_gen]
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.qp_hw_data[QAT_SERVICE_SYMMETRIC];
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const struct qat_qp_hw_data *qp_hw_data = sym_hw_qps + qp_id;
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/* If qp is already in use free ring memory and qp metadata. */
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if (*qp_addr != NULL) {
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ret = qat_sym_qp_release(dev, qp_id);
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if (ret < 0)
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return ret;
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}
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if (qp_id >= qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC)) {
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QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
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return -EINVAL;
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}
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qat_qp_conf.hw = qp_hw_data;
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qat_qp_conf.build_request = qat_sym_build_request;
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qat_qp_conf.cookie_size = sizeof(struct qat_sym_op_cookie);
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qat_qp_conf.nb_descriptors = qp_conf->nb_descriptors;
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qat_qp_conf.socket_id = socket_id;
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qat_qp_conf.service_str = "sym";
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ret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf);
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if (ret != 0)
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return ret;
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/* store a link to the qp in the qat_pci_device */
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qat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][qp_id]
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= *qp_addr;
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qp = (struct qat_qp *)*qp_addr;
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qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;
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for (i = 0; i < qp->nb_descriptors; i++) {
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struct qat_sym_op_cookie *cookie =
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qp->op_cookies[i];
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cookie->qat_sgl_src_phys_addr =
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rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_sym_op_cookie,
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qat_sgl_src);
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cookie->qat_sgl_dst_phys_addr =
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rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_sym_op_cookie,
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qat_sgl_dst);
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}
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return ret;
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}
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static struct rte_cryptodev_ops crypto_qat_ops = {
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/* Device related operations */
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.dev_configure = qat_sym_dev_config,
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.dev_start = qat_sym_dev_start,
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.dev_stop = qat_sym_dev_stop,
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.dev_close = qat_sym_dev_close,
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.dev_infos_get = qat_sym_dev_info_get,
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.stats_get = qat_sym_stats_get,
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.stats_reset = qat_sym_stats_reset,
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.queue_pair_setup = qat_sym_qp_setup,
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.queue_pair_release = qat_sym_qp_release,
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.queue_pair_count = NULL,
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/* Crypto related operations */
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.sym_session_get_size = qat_sym_session_get_private_size,
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.sym_session_configure = qat_sym_session_configure,
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.sym_session_clear = qat_sym_session_clear
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};
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static uint16_t
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qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
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uint16_t nb_ops)
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{
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return qat_enqueue_op_burst(qp, (void **)ops, nb_ops);
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}
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static uint16_t
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qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
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uint16_t nb_ops)
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{
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return qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
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}
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/* An rte_driver is needed in the registration of both the device and the driver
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* with cryptodev.
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* The actual qat pci's rte_driver can't be used as its name represents
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* the whole pci device with all services. Think of this as a holder for a name
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* for the crypto part of the pci device.
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*/
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static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);
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static const struct rte_driver cryptodev_qat_sym_driver = {
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.name = qat_sym_drv_name,
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.alias = qat_sym_drv_name
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};
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int
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qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
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struct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)
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{
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int i = 0;
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struct rte_cryptodev_pmd_init_params init_params = {
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.name = "",
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.socket_id = qat_pci_dev->pci_dev->device.numa_node,
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.private_data_size = sizeof(struct qat_sym_dev_private)
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};
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char name[RTE_CRYPTODEV_NAME_MAX_LEN];
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struct rte_cryptodev *cryptodev;
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struct qat_sym_dev_private *internals;
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snprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, "%s_%s",
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qat_pci_dev->name, "sym");
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QAT_LOG(DEBUG, "Creating QAT SYM device %s", name);
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/* Populate subset device to use in cryptodev device creation */
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qat_pci_dev->sym_rte_dev.driver = &cryptodev_qat_sym_driver;
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qat_pci_dev->sym_rte_dev.numa_node =
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qat_pci_dev->pci_dev->device.numa_node;
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qat_pci_dev->sym_rte_dev.devargs = NULL;
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cryptodev = rte_cryptodev_pmd_create(name,
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&(qat_pci_dev->sym_rte_dev), &init_params);
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if (cryptodev == NULL)
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return -ENODEV;
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qat_pci_dev->sym_rte_dev.name = cryptodev->data->name;
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cryptodev->driver_id = cryptodev_qat_driver_id;
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cryptodev->dev_ops = &crypto_qat_ops;
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cryptodev->enqueue_burst = qat_sym_pmd_enqueue_op_burst;
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cryptodev->dequeue_burst = qat_sym_pmd_dequeue_op_burst;
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cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
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RTE_CRYPTODEV_FF_HW_ACCELERATED |
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RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
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RTE_CRYPTODEV_FF_IN_PLACE_SGL |
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RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
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RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
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RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT |
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RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
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RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
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internals = cryptodev->data->dev_private;
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internals->qat_dev = qat_pci_dev;
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qat_pci_dev->sym_dev = internals;
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internals->sym_dev_id = cryptodev->data->dev_id;
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switch (qat_pci_dev->qat_dev_gen) {
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case QAT_GEN1:
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internals->qat_dev_capabilities = qat_gen1_sym_capabilities;
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break;
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case QAT_GEN2:
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case QAT_GEN3:
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internals->qat_dev_capabilities = qat_gen2_sym_capabilities;
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break;
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default:
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internals->qat_dev_capabilities = qat_gen2_sym_capabilities;
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QAT_LOG(DEBUG,
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"QAT gen %d capabilities unknown, default to GEN2",
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qat_pci_dev->qat_dev_gen);
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break;
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}
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while (1) {
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if (qat_dev_cmd_param[i].name == NULL)
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break;
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if (!strcmp(qat_dev_cmd_param[i].name, SYM_ENQ_THRESHOLD_NAME))
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internals->min_enq_burst_threshold =
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qat_dev_cmd_param[i].val;
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i++;
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}
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QAT_LOG(DEBUG, "Created QAT SYM device %s as cryptodev instance %d",
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cryptodev->data->name, internals->sym_dev_id);
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return 0;
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}
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int
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qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)
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{
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struct rte_cryptodev *cryptodev;
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if (qat_pci_dev == NULL)
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return -ENODEV;
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if (qat_pci_dev->sym_dev == NULL)
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return 0;
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/* free crypto device */
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cryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);
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rte_cryptodev_pmd_destroy(cryptodev);
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qat_pci_dev->sym_rte_dev.name = NULL;
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qat_pci_dev->sym_dev = NULL;
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return 0;
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}
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static struct cryptodev_driver qat_crypto_drv;
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RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
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cryptodev_qat_sym_driver,
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cryptodev_qat_driver_id);
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