dd1cd845c1
This patch introduces armada target to address difference in number of cores, no numa support Signed-off-by: Liron Himi <lironh@marvell.com> Reviewed-by: Alan Winkowski <walan@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gavin Hu <gavin.hu@arm.com>
26 lines
571 B
Plaintext
26 lines
571 B
Plaintext
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2018 Marvell International Ltd
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#
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#include "defconfig_arm64-armv8a-linux-gcc"
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#
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# Compile Environment Abstraction Layer
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#
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CONFIG_RTE_MAX_LCORE=16
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CONFIG_RTE_MAX_NUMA_NODES=1
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CONFIG_RTE_CACHE_LINE_SIZE=64
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# Enable PMDs
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CONFIG_RTE_LIBRTE_MVEP_COMMON=y
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CONFIG_RTE_LIBRTE_MVPP2_PMD=y
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CONFIG_RTE_LIBRTE_MVNETA_PMD=y
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CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=y
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# Disable NXP as it is conflict with MUSDK
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CONFIG_RTE_LIBRTE_DPAA_BUS=n
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# Doesn't support NUMA
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CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
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CONFIG_RTE_LIBRTE_VHOST_NUMA=n
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