1ee9569576
This patch enables the NXP DPAA & DPAA2 drivers for ARMV8 targets. They can be used with standard armv8 config with command line mempool argument or newly introduced platform mempool internal registration mechanism. Note that the dpaa(x) specific config files are still preserved to continue customer support. They also contain some of the ARM performance tuning flags. e.g the default ARM cache size of 128 is not optimal for NXP platforms. However, these configs will eventually be removed once a dynamic mechanisms are developed to detect the performance settings. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
45 lines
1.0 KiB
Plaintext
45 lines
1.0 KiB
Plaintext
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
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# Copyright 2016 NXP
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#
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#include "defconfig_arm64-armv8a-linuxapp-gcc"
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# NXP (Freescale) - Soc Architecture with WRIOP and QBMAN support
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CONFIG_RTE_MACHINE="dpaa2"
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CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
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#
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# Compile Environment Abstraction Layer
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#
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CONFIG_RTE_MAX_LCORE=16
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CONFIG_RTE_MAX_NUMA_NODES=1
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CONFIG_RTE_CACHE_LINE_SIZE=64
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CONFIG_RTE_PKTMBUF_HEADROOM=256
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# Doesn't support NUMA
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CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
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CONFIG_RTE_LIBRTE_VHOST_NUMA=n
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#
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# Compile Support Libraries for DPAA2
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#
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CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=n
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#
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# Compile burst-oriented NXP DPAA2 PMD driver
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#
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
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#
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# Compile NXP DPAA2 crypto sec driver for CAAM HW
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#
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CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
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CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
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CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
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