numam-dpdk/drivers/event
Pavan Nikhilesh f092fb0540 event/octeontx2: configure aura backpressure
In poll mode driver of octeontx2 the RQ is connected to a CQ and it is
responsible for asserting backpressure to the CGX channel.
When event eth Rx adapter is configured, the RQ is connected to a event
queue, to enable backpressure we need to configure AURA assigned to a
given RQ to backpressure CGX channel.
Event device expects unique AURA to be configured per ethernet device.
If multiple RQ from different ethernet devices use the same AURA,
the backpressure will be disabled, application can override this
using devargs:

	-a 0002:0e:00.0,force_rx_bp=1

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-06-30 18:43:05 +02:00
..
cnxk event/cnxk: fix clang build on Arm 2021-06-30 15:03:20 +02:00
dlb2 event/dlb2: select scalar dequeue by default 2021-05-21 15:40:52 +02:00
dpaa log: register with standardized names 2021-05-11 15:17:55 +02:00
dpaa2 log: register with standardized names 2021-05-11 15:17:55 +02:00
dsw event/dsw: flag adapters capabilities 2021-06-30 16:20:19 +02:00
octeontx log: register with standardized names 2021-05-11 15:17:55 +02:00
octeontx2 event/octeontx2: configure aura backpressure 2021-06-30 18:43:05 +02:00
opdl log: register with standardized names 2021-05-11 15:17:55 +02:00
skeleton eventdev: make driver-only headers private 2021-01-29 20:59:09 +01:00
sw log: register with standardized names 2021-05-11 15:17:55 +02:00
meson.build event/cnxk: add build infra and device setup 2021-05-04 05:00:18 +02:00