11b5c7daf0
Introduce enqueue and dequeue functions to support packet based processing. And enable write-combining for ntb driver since it can improve the performance a lot. Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com> Acked-by: Jingjing Wu <jingjing.wu@intel.com>
238 lines
5.5 KiB
C
238 lines
5.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2019 Intel Corporation.
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*/
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#ifndef _NTB_H_
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#define _NTB_H_
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#include <stdbool.h>
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extern int ntb_logtype;
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#define NTB_LOG(level, fmt, args...) \
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rte_log(RTE_LOG_ ## level, ntb_logtype, "%s(): " fmt "\n", \
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__func__, ##args)
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/* Vendor ID */
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#define NTB_INTEL_VENDOR_ID 0x8086
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/* Device IDs */
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#define NTB_INTEL_DEV_ID_B2B_SKX 0x201C
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/* Reserved to app to use. */
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#define NTB_SPAD_USER "spad_user_"
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#define NTB_SPAD_USER_LEN (sizeof(NTB_SPAD_USER) - 1)
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#define NTB_SPAD_USER_MAX_NUM 4
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#define NTB_ATTR_NAME_LEN 30
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#define NTB_DFLT_TX_FREE_THRESH 256
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enum ntb_xstats_idx {
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NTB_TX_PKTS_ID = 0,
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NTB_TX_BYTES_ID,
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NTB_TX_ERRS_ID,
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NTB_RX_PKTS_ID,
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NTB_RX_BYTES_ID,
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NTB_RX_MISS_ID,
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};
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enum ntb_topo {
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NTB_TOPO_NONE = 0,
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NTB_TOPO_B2B_USD,
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NTB_TOPO_B2B_DSD,
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};
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enum ntb_link {
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NTB_LINK_DOWN = 0,
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NTB_LINK_UP,
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};
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enum ntb_speed {
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NTB_SPEED_NONE = 0,
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NTB_SPEED_GEN1 = 1,
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NTB_SPEED_GEN2 = 2,
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NTB_SPEED_GEN3 = 3,
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NTB_SPEED_GEN4 = 4,
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};
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enum ntb_width {
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NTB_WIDTH_NONE = 0,
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NTB_WIDTH_1 = 1,
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NTB_WIDTH_2 = 2,
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NTB_WIDTH_4 = 4,
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NTB_WIDTH_8 = 8,
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NTB_WIDTH_12 = 12,
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NTB_WIDTH_16 = 16,
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NTB_WIDTH_32 = 32,
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};
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/* Define spad registers usage. 0 is reserved. */
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enum ntb_spad_idx {
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SPAD_NUM_MWS = 1,
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SPAD_NUM_QPS,
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SPAD_Q_SZ,
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SPAD_USED_MWS,
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SPAD_MW0_SZ_H,
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SPAD_MW0_SZ_L,
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SPAD_MW1_SZ_H,
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SPAD_MW1_SZ_L,
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SPAD_MW0_BA_H,
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SPAD_MW0_BA_L,
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SPAD_MW1_BA_H,
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SPAD_MW1_BA_L,
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};
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/**
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* NTB device operations
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* @ntb_dev_init: Init ntb dev.
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* @get_peer_mw_addr: To get the addr of peer mw[mw_idx].
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* @mw_set_trans: Set translation of internal memory that remote can access.
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* @ioremap: Translate the remote host address to bar address.
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* @get_link_status: get link status, link speed and link width.
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* @set_link: Set local side up/down.
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* @spad_read: Read local/peer spad register val.
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* @spad_write: Write val to local/peer spad register.
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* @db_read: Read doorbells status.
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* @db_clear: Clear local doorbells.
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* @db_set_mask: Set bits in db mask, preventing db interrpts generated
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* for those db bits.
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* @peer_db_set: Set doorbell bit to generate peer interrupt for that bit.
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* @vector_bind: Bind vector source [intr] to msix vector [msix].
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*/
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struct ntb_dev_ops {
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int (*ntb_dev_init)(const struct rte_rawdev *dev);
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void *(*get_peer_mw_addr)(const struct rte_rawdev *dev, int mw_idx);
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int (*mw_set_trans)(const struct rte_rawdev *dev, int mw_idx,
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uint64_t addr, uint64_t size);
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void *(*ioremap)(const struct rte_rawdev *dev, uint64_t addr);
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int (*get_link_status)(const struct rte_rawdev *dev);
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int (*set_link)(const struct rte_rawdev *dev, bool up);
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uint32_t (*spad_read)(const struct rte_rawdev *dev, int spad,
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bool peer);
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int (*spad_write)(const struct rte_rawdev *dev, int spad,
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bool peer, uint32_t spad_v);
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uint64_t (*db_read)(const struct rte_rawdev *dev);
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int (*db_clear)(const struct rte_rawdev *dev, uint64_t db_bits);
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int (*db_set_mask)(const struct rte_rawdev *dev, uint64_t db_mask);
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int (*peer_db_set)(const struct rte_rawdev *dev, uint8_t db_bit);
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int (*vector_bind)(const struct rte_rawdev *dev, uint8_t intr,
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uint8_t msix);
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};
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struct ntb_desc {
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uint64_t addr; /* buffer addr */
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uint16_t len; /* buffer length */
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uint16_t rsv1;
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uint32_t rsv2;
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};
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#define NTB_FLAG_EOP 1 /* end of packet */
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struct ntb_used {
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uint16_t len; /* buffer length */
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uint16_t flags; /* flags */
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};
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struct ntb_rx_entry {
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struct rte_mbuf *mbuf;
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};
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struct ntb_rx_queue {
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struct ntb_desc *rx_desc_ring;
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volatile struct ntb_used *rx_used_ring;
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uint16_t *avail_cnt;
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volatile uint16_t *used_cnt;
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uint16_t last_avail;
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uint16_t last_used;
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uint16_t nb_rx_desc;
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uint16_t rx_free_thresh;
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struct rte_mempool *mpool; /* mempool for mbuf allocation */
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struct ntb_rx_entry *sw_ring;
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uint16_t queue_id; /* DPDK queue index. */
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uint16_t port_id; /* Device port identifier. */
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struct ntb_hw *hw;
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};
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struct ntb_tx_entry {
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struct rte_mbuf *mbuf;
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uint16_t next_id;
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uint16_t last_id;
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};
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struct ntb_tx_queue {
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volatile struct ntb_desc *tx_desc_ring;
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struct ntb_used *tx_used_ring;
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volatile uint16_t *avail_cnt;
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uint16_t *used_cnt;
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uint16_t last_avail; /* Next need to be free. */
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uint16_t last_used; /* Next need to be sent. */
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uint16_t nb_tx_desc;
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/* Total number of TX descriptors ready to be allocated. */
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uint16_t nb_tx_free;
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uint16_t tx_free_thresh;
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struct ntb_tx_entry *sw_ring;
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uint16_t queue_id; /* DPDK queue index. */
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uint16_t port_id; /* Device port identifier. */
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struct ntb_hw *hw;
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};
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struct ntb_header {
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uint16_t avail_cnt __rte_cache_aligned;
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uint16_t used_cnt __rte_cache_aligned;
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struct ntb_desc desc_ring[] __rte_cache_aligned;
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};
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/* ntb private data. */
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struct ntb_hw {
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uint8_t mw_cnt;
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uint8_t db_cnt;
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uint8_t spad_cnt;
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uint64_t db_valid_mask;
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uint64_t db_mask;
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enum ntb_topo topo;
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enum ntb_link link_status;
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enum ntb_speed link_speed;
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enum ntb_width link_width;
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const struct ntb_dev_ops *ntb_ops;
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struct rte_pci_device *pci_dev;
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char *hw_addr;
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uint8_t peer_dev_up;
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uint64_t *mw_size;
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/* remote mem base addr */
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uint64_t *peer_mw_base;
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uint16_t queue_pairs;
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uint16_t queue_size;
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uint32_t hdr_size_per_queue;
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struct ntb_rx_queue **rx_queues;
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struct ntb_tx_queue **tx_queues;
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/* memzone to populate RX ring. */
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const struct rte_memzone **mz;
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uint8_t used_mw_num;
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uint8_t peer_used_mws;
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uint64_t *ntb_xstats;
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uint64_t *ntb_xstats_off;
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/* Reserve several spad for app to use. */
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int spad_user_list[NTB_SPAD_USER_MAX_NUM];
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};
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#endif /* _NTB_H_ */
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