Currently the HW is configured with only one pool which its
buffer size may be larger than the rx-fifo-size.
In that situation, frame size larger than the fifo-size
is gets dropped due to fifo overrun.
This is cause because the HW works in cut-through mode which
waits to have in the fifo at least the amount of bytes as define
in the smallest pool's buffer size.
This patch add a dummy pool which its buffer size
is very small (smaller than 64B frame). This tricks the HW and
any frame size is gets passed from the FIFO to the PP2.
Signed-off-by: Liron Himi <lironh@marvell.com>
30d3072070