3318aef7e7
This commit adds support for MAC flow steering rules mandatory for the RX path as well as the related callbacks to add/remove MAC addresses. Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com> Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com> Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
159 lines
5.8 KiB
C
159 lines
5.8 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright 2015 6WIND S.A.
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* Copyright 2015 Mellanox.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of 6WIND S.A. nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef RTE_PMD_MLX5_RXTX_H_
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#define RTE_PMD_MLX5_RXTX_H_
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#include <stdint.h>
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/* Verbs header. */
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/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-pedantic"
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#endif
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#include <infiniband/verbs.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-pedantic"
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#endif
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/* DPDK headers don't like -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-pedantic"
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#endif
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#include <rte_mbuf.h>
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#include <rte_mempool.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-pedantic"
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#endif
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#include "mlx5_utils.h"
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#include "mlx5.h"
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#include "mlx5_defs.h"
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/* RX element. */
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struct rxq_elt {
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struct ibv_recv_wr wr; /* Work Request. */
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struct ibv_sge sge; /* Scatter/Gather Element. */
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/* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
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};
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struct priv;
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/* RX queue descriptor. */
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struct rxq {
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struct priv *priv; /* Back pointer to private data. */
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struct rte_mempool *mp; /* Memory Pool for allocations. */
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struct ibv_mr *mr; /* Memory Region (for mp). */
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struct ibv_cq *cq; /* Completion Queue. */
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struct ibv_qp *qp; /* Queue Pair. */
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struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
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struct ibv_exp_cq_family *if_cq; /* CQ interface. */
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/* MAC flow steering rules. */
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struct ibv_flow *mac_flow[MLX5_MAX_MAC_ADDRESSES];
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unsigned int port_id; /* Port ID for incoming packets. */
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unsigned int elts_n; /* (*elts)[] length. */
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unsigned int elts_head; /* Current index in (*elts)[]. */
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union {
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struct rxq_elt (*no_sp)[]; /* RX elements. */
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} elts;
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uint32_t mb_len; /* Length of a mp-issued mbuf. */
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unsigned int socket; /* CPU socket ID for allocations. */
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struct ibv_exp_res_domain *rd; /* Resource Domain. */
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};
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/* TX element. */
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struct txq_elt {
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struct rte_mbuf *buf;
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};
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/* Linear buffer type. It is used when transmitting buffers with too many
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* segments that do not fit the hardware queue (see max_send_sge).
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* Extra segments are copied (linearized) in such buffers, replacing the
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* last SGE during TX.
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* The size is arbitrary but large enough to hold a jumbo frame with
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* 8 segments considering mbuf.buf_len is about 2048 bytes. */
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typedef uint8_t linear_t[16384];
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/* TX queue descriptor. */
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struct txq {
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struct priv *priv; /* Back pointer to private data. */
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struct {
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struct rte_mempool *mp; /* Cached Memory Pool. */
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struct ibv_mr *mr; /* Memory Region (for mp). */
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uint32_t lkey; /* mr->lkey */
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} mp2mr[MLX5_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
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struct ibv_cq *cq; /* Completion Queue. */
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struct ibv_qp *qp; /* Queue Pair. */
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struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
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struct ibv_exp_cq_family *if_cq; /* CQ interface. */
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#if MLX5_PMD_MAX_INLINE > 0
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uint32_t max_inline; /* Max inline send size <= MLX5_PMD_MAX_INLINE. */
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#endif
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unsigned int elts_n; /* (*elts)[] length. */
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struct txq_elt (*elts)[]; /* TX elements. */
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unsigned int elts_head; /* Current index in (*elts)[]. */
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unsigned int elts_tail; /* First element awaiting completion. */
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unsigned int elts_comp; /* Number of completion requests. */
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unsigned int elts_comp_cd; /* Countdown for next completion request. */
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unsigned int elts_comp_cd_init; /* Initial value for countdown. */
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linear_t (*elts_linear)[]; /* Linearized buffers. */
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struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
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unsigned int socket; /* CPU socket ID for allocations. */
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struct ibv_exp_res_domain *rd; /* Resource Domain. */
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};
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/* mlx5_rxq.c */
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void rxq_cleanup(struct rxq *);
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int rxq_setup(struct rte_eth_dev *, struct rxq *, uint16_t, unsigned int,
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const struct rte_eth_rxconf *, struct rte_mempool *);
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int mlx5_rx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
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const struct rte_eth_rxconf *, struct rte_mempool *);
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void mlx5_rx_queue_release(void *);
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/* mlx5_txq.c */
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void txq_cleanup(struct txq *);
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int mlx5_tx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
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const struct rte_eth_txconf *);
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void mlx5_tx_queue_release(void *);
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/* mlx5_rxtx.c */
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uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t);
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uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);
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uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t);
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uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
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#endif /* RTE_PMD_MLX5_RXTX_H_ */
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