37862dafcb
In order to support 32-bit systems, the 8B doorbell write should be done by 2 4B stores. The order between the store is important, that's why memory barrier should be used between them. The doorbell address is shared between all the queues, that's why a lock should wrap the 2 stores. Signed-off-by: Matan Azrad <matan@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> |
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isal | ||
mlx5 | ||
octeontx | ||
qat | ||
zlib | ||
meson.build |