bab97a3ffb
CN98xx SoC comes up with two CPT blocks wrt CN96xx, CN93xx, to achieve higher performance. Adding support to allocate all LFs of VF with even BDF from CPT0 and all LFs of VF with odd BDF from CPT1. If LFs are not available in one block then they will be allocated from alternate block. Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Anoob Joseph <anoobj@marvell.com>
38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (C) 2019 Marvell International Ltd.
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*/
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#ifndef _OTX2_CRYPTODEV_MBOX_H_
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#define _OTX2_CRYPTODEV_MBOX_H_
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#include <rte_cryptodev.h>
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#include "otx2_cryptodev_hw_access.h"
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int otx2_cpt_hardware_caps_get(const struct rte_cryptodev *dev,
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union cpt_eng_caps *hw_caps);
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int otx2_cpt_available_queues_get(const struct rte_cryptodev *dev,
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uint16_t *nb_queues);
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int otx2_cpt_queues_attach(const struct rte_cryptodev *dev, uint8_t nb_queues);
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int otx2_cpt_queues_detach(const struct rte_cryptodev *dev);
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int otx2_cpt_msix_offsets_get(const struct rte_cryptodev *dev);
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__rte_internal
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int otx2_cpt_af_reg_read(const struct rte_cryptodev *dev, uint64_t reg,
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uint8_t blkaddr, uint64_t *val);
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__rte_internal
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int otx2_cpt_af_reg_write(const struct rte_cryptodev *dev, uint64_t reg,
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uint8_t blkaddr, uint64_t val);
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int otx2_cpt_qp_ethdev_bind(const struct rte_cryptodev *dev,
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struct otx2_cpt_qp *qp, uint16_t port_id);
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int otx2_cpt_inline_init(const struct rte_cryptodev *dev);
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#endif /* _OTX2_CRYPTODEV_MBOX_H_ */
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