92c6786e85
This patch defines various PCI config space access APIs in order to read and find IOV specific PCI capabilities. With these definitions implemented, it enables the base driver to do SR-IOV specific initialization and HW specific configuration required from PF-PMD driver instance. Signed-off-by: Manish Chopra <manishc@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Rasesh Mody <rmody@marvell.com>
151 lines
4.3 KiB
C
151 lines
4.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2015 Intel Corporation.
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* Copyright 2013-2014 6WIND S.A.
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*/
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#ifndef _RTE_PCI_H_
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#define _RTE_PCI_H_
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/**
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* @file
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*
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* RTE PCI Library
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdio.h>
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#include <limits.h>
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#include <sys/queue.h>
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#include <inttypes.h>
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#include <sys/types.h>
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/*
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* Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
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* configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
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* configuration space.
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*/
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#define RTE_PCI_CFG_SPACE_SIZE 256
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#define RTE_PCI_CFG_SPACE_EXP_SIZE 4096
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#define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
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#define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
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/* PCI Express capability registers */
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#define RTE_PCI_EXP_DEVCTL 8 /* Device Control */
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/* Extended Capabilities (PCI-X 2.0 and Express) */
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#define RTE_PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
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#define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
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#define RTE_PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error Reporting */
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#define RTE_PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */
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#define RTE_PCI_EXT_CAP_ID_SRIOV 0x10 /* SR-IOV*/
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/* Single Root I/O Virtualization */
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#define RTE_PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */
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#define RTE_PCI_SRIOV_CTRL 0x08 /* SR-IOV Control */
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#define RTE_PCI_SRIOV_INITIAL_VF 0x0c /* Initial VFs */
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#define RTE_PCI_SRIOV_TOTAL_VF 0x0e /* Total VFs */
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#define RTE_PCI_SRIOV_NUM_VF 0x10 /* Number of VFs */
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#define RTE_PCI_SRIOV_FUNC_LINK 0x12 /* Function Dependency Link */
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#define RTE_PCI_SRIOV_VF_OFFSET 0x14 /* First VF Offset */
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#define RTE_PCI_SRIOV_VF_STRIDE 0x16 /* Following VF Stride */
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#define RTE_PCI_SRIOV_VF_DID 0x1a /* VF Device ID */
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#define RTE_PCI_SRIOV_SUP_PGSIZE 0x1c /* Supported Page Sizes */
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/** Formatting string for PCI device identifier: Ex: 0000:00:01.0 */
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#define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
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#define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X")
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/** Short formatting string, without domain, for PCI device: Ex: 00:01.0 */
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#define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
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/** Nb. of values in PCI device identifier format string. */
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#define PCI_FMT_NVAL 4
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/** Nb. of values in PCI resource format. */
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#define PCI_RESOURCE_FMT_NVAL 3
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/** Maximum number of PCI resources. */
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#define PCI_MAX_RESOURCE 6
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/**
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* A structure describing an ID for a PCI driver. Each driver provides a
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* table of these IDs for each device that it supports.
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*/
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struct rte_pci_id {
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uint32_t class_id; /**< Class ID or RTE_CLASS_ANY_ID. */
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uint16_t vendor_id; /**< Vendor ID or PCI_ANY_ID. */
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uint16_t device_id; /**< Device ID or PCI_ANY_ID. */
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uint16_t subsystem_vendor_id; /**< Subsystem vendor ID or PCI_ANY_ID. */
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uint16_t subsystem_device_id; /**< Subsystem device ID or PCI_ANY_ID. */
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};
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/**
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* A structure describing the location of a PCI device.
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*/
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struct rte_pci_addr {
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uint32_t domain; /**< Device domain */
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uint8_t bus; /**< Device bus */
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uint8_t devid; /**< Device ID */
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uint8_t function; /**< Device function. */
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};
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/** Any PCI device identifier (vendor, device, ...) */
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#define PCI_ANY_ID (0xffff)
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#define RTE_CLASS_ANY_ID (0xffffff)
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/**
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* Utility function to write a pci device name, this device name can later be
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* used to retrieve the corresponding rte_pci_addr using eal_parse_pci_*
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* BDF helpers.
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*
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* @param addr
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* The PCI Bus-Device-Function address
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* @param output
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* The output buffer string
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* @param size
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* The output buffer size
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*/
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void rte_pci_device_name(const struct rte_pci_addr *addr,
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char *output, size_t size);
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/**
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* Utility function to compare two PCI device addresses.
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*
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* @param addr
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* The PCI Bus-Device-Function address to compare
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* @param addr2
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* The PCI Bus-Device-Function address to compare
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* @return
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* 0 on equal PCI address.
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* Positive on addr is greater than addr2.
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* Negative on addr is less than addr2, or error.
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*/
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int rte_pci_addr_cmp(const struct rte_pci_addr *addr,
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const struct rte_pci_addr *addr2);
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/**
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* Utility function to parse a string into a PCI location.
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*
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* @param str
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* The string to parse
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* @param addr
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* The reference to the structure where the location
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* is stored.
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* @return
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* 0 on success
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* <0 otherwise
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*/
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int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_PCI_H_ */
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