fe5846bcc0
Add support for inline inbound SPI range via devargs instead of just max SPI value and range being 0..max. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
366 lines
8.9 KiB
C
366 lines
8.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#include <rte_common.h>
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#include <rte_memzone.h>
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#include "cnxk_ethdev.h"
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#define SA_BASE_TBL_SZ (RTE_MAX_ETHPORTS * sizeof(uintptr_t))
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#define LOOKUP_ARRAY_SZ (PTYPE_ARRAY_SZ + ERR_ARRAY_SZ + SA_BASE_TBL_SZ)
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const uint32_t *
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cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev)
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{
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RTE_SET_USED(eth_dev);
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static const uint32_t ptypes[] = {
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RTE_PTYPE_L2_ETHER_QINQ, /* LB */
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RTE_PTYPE_L2_ETHER_VLAN, /* LB */
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RTE_PTYPE_L2_ETHER_TIMESYNC, /* LB */
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RTE_PTYPE_L2_ETHER_ARP, /* LC */
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RTE_PTYPE_L2_ETHER_NSH, /* LC */
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RTE_PTYPE_L2_ETHER_FCOE, /* LC */
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RTE_PTYPE_L2_ETHER_MPLS, /* LC */
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RTE_PTYPE_L3_IPV4, /* LC */
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RTE_PTYPE_L3_IPV4_EXT, /* LC */
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RTE_PTYPE_L3_IPV6, /* LC */
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RTE_PTYPE_L3_IPV6_EXT, /* LC */
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RTE_PTYPE_L4_TCP, /* LD */
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RTE_PTYPE_L4_UDP, /* LD */
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RTE_PTYPE_L4_SCTP, /* LD */
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RTE_PTYPE_L4_ICMP, /* LD */
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RTE_PTYPE_L4_IGMP, /* LD */
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RTE_PTYPE_TUNNEL_GRE, /* LD */
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RTE_PTYPE_TUNNEL_ESP, /* LD */
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RTE_PTYPE_TUNNEL_NVGRE, /* LD */
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RTE_PTYPE_TUNNEL_VXLAN, /* LE */
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RTE_PTYPE_TUNNEL_GENEVE, /* LE */
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RTE_PTYPE_TUNNEL_GTPC, /* LE */
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RTE_PTYPE_TUNNEL_GTPU, /* LE */
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RTE_PTYPE_TUNNEL_VXLAN_GPE, /* LE */
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RTE_PTYPE_TUNNEL_MPLS_IN_GRE, /* LE */
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RTE_PTYPE_TUNNEL_MPLS_IN_UDP, /* LE */
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RTE_PTYPE_INNER_L2_ETHER, /* LF */
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RTE_PTYPE_INNER_L3_IPV4, /* LG */
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RTE_PTYPE_INNER_L3_IPV6, /* LG */
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RTE_PTYPE_INNER_L4_TCP, /* LH */
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RTE_PTYPE_INNER_L4_UDP, /* LH */
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RTE_PTYPE_INNER_L4_SCTP, /* LH */
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RTE_PTYPE_INNER_L4_ICMP, /* LH */
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RTE_PTYPE_UNKNOWN,
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};
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return ptypes;
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}
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/*
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* +------------------ +------------------ +
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* | | IL4 | IL3| IL2 | TU | L4 | L3 | L2 |
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* +-------------------+-------------------+
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*
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* +-------------------+------------------ +
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* | | LH | LG | LF | LE | LD | LC | LB |
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* +-------------------+-------------------+
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*
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* ptype [LE - LD - LC - LB] = TU - L4 - L3 - T2
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* ptype_tunnel[LH - LG - LF] = IL4 - IL3 - IL2 - TU
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*
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*/
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static void
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nix_create_non_tunnel_ptype_array(uint16_t *ptype)
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{
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uint8_t lb, lc, ld, le;
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uint16_t val;
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uint32_t idx;
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for (idx = 0; idx < PTYPE_NON_TUNNEL_ARRAY_SZ; idx++) {
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lb = idx & 0xF;
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lc = (idx & 0xF0) >> 4;
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ld = (idx & 0xF00) >> 8;
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le = (idx & 0xF000) >> 12;
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val = RTE_PTYPE_UNKNOWN;
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switch (lb) {
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case NPC_LT_LB_STAG_QINQ:
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val |= RTE_PTYPE_L2_ETHER_QINQ;
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break;
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case NPC_LT_LB_CTAG:
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val |= RTE_PTYPE_L2_ETHER_VLAN;
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break;
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}
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switch (lc) {
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case NPC_LT_LC_ARP:
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val |= RTE_PTYPE_L2_ETHER_ARP;
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break;
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case NPC_LT_LC_NSH:
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val |= RTE_PTYPE_L2_ETHER_NSH;
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break;
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case NPC_LT_LC_FCOE:
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val |= RTE_PTYPE_L2_ETHER_FCOE;
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break;
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case NPC_LT_LC_MPLS:
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val |= RTE_PTYPE_L2_ETHER_MPLS;
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break;
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case NPC_LT_LC_IP:
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val |= RTE_PTYPE_L3_IPV4;
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break;
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case NPC_LT_LC_IP_OPT:
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val |= RTE_PTYPE_L3_IPV4_EXT;
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break;
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case NPC_LT_LC_IP6:
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val |= RTE_PTYPE_L3_IPV6;
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break;
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case NPC_LT_LC_IP6_EXT:
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val |= RTE_PTYPE_L3_IPV6_EXT;
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break;
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case NPC_LT_LC_PTP:
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val |= RTE_PTYPE_L2_ETHER_TIMESYNC;
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break;
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}
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switch (ld) {
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case NPC_LT_LD_TCP:
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val |= RTE_PTYPE_L4_TCP;
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break;
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case NPC_LT_LD_UDP:
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val |= RTE_PTYPE_L4_UDP;
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break;
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case NPC_LT_LD_SCTP:
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val |= RTE_PTYPE_L4_SCTP;
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break;
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case NPC_LT_LD_ICMP:
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case NPC_LT_LD_ICMP6:
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val |= RTE_PTYPE_L4_ICMP;
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break;
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case NPC_LT_LD_IGMP:
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val |= RTE_PTYPE_L4_IGMP;
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break;
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case NPC_LT_LD_GRE:
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val |= RTE_PTYPE_TUNNEL_GRE;
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break;
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case NPC_LT_LD_NVGRE:
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val |= RTE_PTYPE_TUNNEL_NVGRE;
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break;
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}
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switch (le) {
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case NPC_LT_LE_VXLAN:
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val |= RTE_PTYPE_TUNNEL_VXLAN;
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break;
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case NPC_LT_LE_ESP:
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val |= RTE_PTYPE_TUNNEL_ESP;
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break;
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case NPC_LT_LE_VXLANGPE:
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val |= RTE_PTYPE_TUNNEL_VXLAN_GPE;
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break;
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case NPC_LT_LE_GENEVE:
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val |= RTE_PTYPE_TUNNEL_GENEVE;
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break;
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case NPC_LT_LE_GTPC:
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val |= RTE_PTYPE_TUNNEL_GTPC;
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break;
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case NPC_LT_LE_GTPU:
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val |= RTE_PTYPE_TUNNEL_GTPU;
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break;
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case NPC_LT_LE_TU_MPLS_IN_GRE:
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val |= RTE_PTYPE_TUNNEL_MPLS_IN_GRE;
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break;
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case NPC_LT_LE_TU_MPLS_IN_UDP:
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val |= RTE_PTYPE_TUNNEL_MPLS_IN_UDP;
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break;
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}
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ptype[idx] = val;
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}
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}
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#define TU_SHIFT(x) ((x) >> PTYPE_NON_TUNNEL_WIDTH)
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static void
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nix_create_tunnel_ptype_array(uint16_t *ptype)
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{
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uint8_t lf, lg, lh;
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uint16_t val;
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uint32_t idx;
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/* Skip non tunnel ptype array memory */
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ptype = ptype + PTYPE_NON_TUNNEL_ARRAY_SZ;
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for (idx = 0; idx < PTYPE_TUNNEL_ARRAY_SZ; idx++) {
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lf = idx & 0xF;
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lg = (idx & 0xF0) >> 4;
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lh = (idx & 0xF00) >> 8;
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val = RTE_PTYPE_UNKNOWN;
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switch (lf) {
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case NPC_LT_LF_TU_ETHER:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L2_ETHER);
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break;
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}
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switch (lg) {
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case NPC_LT_LG_TU_IP:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV4);
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break;
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case NPC_LT_LG_TU_IP6:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV6);
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break;
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}
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switch (lh) {
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case NPC_LT_LH_TU_TCP:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L4_TCP);
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break;
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case NPC_LT_LH_TU_UDP:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L4_UDP);
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break;
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case NPC_LT_LH_TU_SCTP:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L4_SCTP);
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break;
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case NPC_LT_LH_TU_ICMP:
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case NPC_LT_LH_TU_ICMP6:
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val |= TU_SHIFT(RTE_PTYPE_INNER_L4_ICMP);
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break;
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}
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ptype[idx] = val;
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}
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}
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static void
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nix_create_rx_ol_flags_array(void *mem)
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{
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uint16_t idx, errcode, errlev;
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uint32_t val, *ol_flags;
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/* Skip ptype array memory */
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ol_flags = (uint32_t *)((uint8_t *)mem + PTYPE_ARRAY_SZ);
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for (idx = 0; idx < BIT(ERRCODE_ERRLEN_WIDTH); idx++) {
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errlev = idx & 0xf;
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errcode = (idx & 0xff0) >> 4;
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val = RTE_MBUF_F_RX_IP_CKSUM_UNKNOWN;
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val |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
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val |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_UNKNOWN;
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switch (errlev) {
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case NPC_ERRLEV_RE:
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/* Mark all errors as BAD checksum errors
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* including Outer L2 length mismatch error
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*/
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if (errcode) {
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val |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
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val |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
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} else {
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val |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
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val |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
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}
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break;
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case NPC_ERRLEV_LC:
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if (errcode == NPC_EC_OIP4_CSUM ||
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errcode == NPC_EC_IP_FRAG_OFFSET_1) {
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val |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
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val |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;
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} else {
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val |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
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}
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break;
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case NPC_ERRLEV_LG:
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if (errcode == NPC_EC_IIP4_CSUM)
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val |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
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else
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val |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
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break;
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case NPC_ERRLEV_NIX:
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if (errcode == NIX_RX_PERRCODE_OL4_CHK ||
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errcode == NIX_RX_PERRCODE_OL4_LEN ||
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errcode == NIX_RX_PERRCODE_OL4_PORT) {
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val |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
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val |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
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val |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;
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} else if (errcode == NIX_RX_PERRCODE_IL4_CHK ||
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errcode == NIX_RX_PERRCODE_IL4_LEN ||
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errcode == NIX_RX_PERRCODE_IL4_PORT) {
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val |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
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val |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
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} else if (errcode == NIX_RX_PERRCODE_IL3_LEN ||
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errcode == NIX_RX_PERRCODE_OL3_LEN) {
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val |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
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} else {
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val |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
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val |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
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}
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break;
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}
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ol_flags[idx] = val;
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}
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}
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void *
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cnxk_nix_fastpath_lookup_mem_get(void)
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{
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const char name[] = CNXK_NIX_FASTPATH_LOOKUP_MEM;
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const struct rte_memzone *mz;
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void *mem;
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mz = rte_memzone_lookup(name);
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if (mz != NULL)
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return mz->addr;
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/* Request for the first time */
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mz = rte_memzone_reserve_aligned(name, LOOKUP_ARRAY_SZ, SOCKET_ID_ANY,
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0, ROC_ALIGN);
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if (mz != NULL) {
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mem = mz->addr;
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/* Form the ptype array lookup memory */
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nix_create_non_tunnel_ptype_array(mem);
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nix_create_tunnel_ptype_array(mem);
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/* Form the rx ol_flags based on errcode */
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nix_create_rx_ol_flags_array(mem);
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return mem;
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}
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return NULL;
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}
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int
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cnxk_nix_lookup_mem_sa_base_set(struct cnxk_eth_dev *dev)
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{
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void *lookup_mem = cnxk_nix_fastpath_lookup_mem_get();
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uint16_t port = dev->eth_dev->data->port_id;
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uintptr_t sa_base_tbl;
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uintptr_t sa_base;
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uint8_t sa_w;
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if (!lookup_mem)
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return -EIO;
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sa_base = roc_nix_inl_inb_sa_base_get(&dev->nix, dev->inb.inl_dev);
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if (!sa_base)
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return -ENOTSUP;
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sa_w = plt_log2_u32(dev->nix.ipsec_in_max_spi + 1 -
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dev->nix.ipsec_in_min_spi);
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/* Set SA Base in lookup mem */
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sa_base_tbl = (uintptr_t)lookup_mem;
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sa_base_tbl += PTYPE_ARRAY_SZ + ERR_ARRAY_SZ;
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*((uintptr_t *)sa_base_tbl + port) = sa_base | sa_w;
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return 0;
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}
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int
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cnxk_nix_lookup_mem_sa_base_clear(struct cnxk_eth_dev *dev)
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{
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void *lookup_mem = cnxk_nix_fastpath_lookup_mem_get();
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uint16_t port = dev->eth_dev->data->port_id;
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uintptr_t sa_base_tbl;
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if (!lookup_mem)
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return -EIO;
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/* Set SA Base in lookup mem */
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sa_base_tbl = (uintptr_t)lookup_mem;
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sa_base_tbl += PTYPE_ARRAY_SZ + ERR_ARRAY_SZ;
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*((uintptr_t *)sa_base_tbl + port) = 0;
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return 0;
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}
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