450356b2ed
Use em vector path to process event vector. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Shijith Thotton <sthotton@marvell.com>
161 lines
4.0 KiB
C
161 lines
4.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2016 Intel Corporation
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*/
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#ifndef __L3FWD_EM_SEQUENTIAL_H__
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#define __L3FWD_EM_SEQUENTIAL_H__
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#include <rte_common.h>
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/**
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* @file
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* This is an optional implementation of packet classification in Exact-Match
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* path using sequential packet classification method.
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* While hash lookup multi seems to provide better performance, it's disabled
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* by default and can be enabled with NO_HASH_LOOKUP_MULTI global define in
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* compilation time.
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*/
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#if defined RTE_ARCH_X86
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#include "l3fwd_sse.h"
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#elif defined __ARM_NEON
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#include "l3fwd_neon.h"
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#endif
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static __rte_always_inline uint16_t
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em_get_dst_port(const struct lcore_conf *qconf, struct rte_mbuf *pkt,
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uint16_t portid)
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{
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uint8_t next_hop;
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struct rte_ipv4_hdr *ipv4_hdr;
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struct rte_ipv6_hdr *ipv6_hdr;
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uint32_t tcp_or_udp;
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uint32_t l3_ptypes;
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tcp_or_udp = pkt->packet_type & (RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP);
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l3_ptypes = pkt->packet_type & RTE_PTYPE_L3_MASK;
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if (tcp_or_udp && (l3_ptypes == RTE_PTYPE_L3_IPV4)) {
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/* Handle IPv4 headers.*/
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ipv4_hdr = rte_pktmbuf_mtod_offset(pkt, struct rte_ipv4_hdr *,
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sizeof(struct rte_ether_hdr));
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next_hop = em_get_ipv4_dst_port(ipv4_hdr, portid,
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qconf->ipv4_lookup_struct);
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if (next_hop >= RTE_MAX_ETHPORTS ||
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(enabled_port_mask & 1 << next_hop) == 0)
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next_hop = portid;
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return next_hop;
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} else if (tcp_or_udp && (l3_ptypes == RTE_PTYPE_L3_IPV6)) {
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/* Handle IPv6 headers.*/
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ipv6_hdr = rte_pktmbuf_mtod_offset(pkt, struct rte_ipv6_hdr *,
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sizeof(struct rte_ether_hdr));
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next_hop = em_get_ipv6_dst_port(ipv6_hdr, portid,
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qconf->ipv6_lookup_struct);
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if (next_hop >= RTE_MAX_ETHPORTS ||
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(enabled_port_mask & 1 << next_hop) == 0)
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next_hop = portid;
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return next_hop;
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}
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return portid;
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}
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/*
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* Buffer optimized handling of packets, invoked
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* from main_loop.
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*/
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static inline void
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l3fwd_em_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
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uint16_t portid, struct lcore_conf *qconf)
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{
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int32_t i, j;
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uint16_t dst_port[MAX_PKT_BURST];
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if (nb_rx > 0) {
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rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[0],
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struct rte_ether_hdr *) + 1);
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}
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for (i = 1, j = 0; j < nb_rx; i++, j++) {
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if (i < nb_rx) {
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rte_prefetch0(rte_pktmbuf_mtod(
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pkts_burst[i],
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struct rte_ether_hdr *) + 1);
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}
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dst_port[j] = em_get_dst_port(qconf, pkts_burst[j], portid);
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}
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send_packets_multi(qconf, pkts_burst, dst_port, nb_rx);
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}
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/*
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* Buffer optimized handling of events, invoked
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* from main_loop.
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*/
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static inline void
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l3fwd_em_process_events(int nb_rx, struct rte_event **events,
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struct lcore_conf *qconf)
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{
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int32_t i, j;
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rte_prefetch0(rte_pktmbuf_mtod(events[0]->mbuf,
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struct rte_ether_hdr *) + 1);
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for (i = 1, j = 0; j < nb_rx; i++, j++) {
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struct rte_mbuf *mbuf = events[j]->mbuf;
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uint16_t port;
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if (i < nb_rx) {
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rte_prefetch0(rte_pktmbuf_mtod(
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events[i]->mbuf,
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struct rte_ether_hdr *) + 1);
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}
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port = mbuf->port;
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mbuf->port = em_get_dst_port(qconf, mbuf, mbuf->port);
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process_packet(mbuf, &mbuf->port);
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if (mbuf->port == BAD_PORT)
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mbuf->port = port;
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}
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}
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static inline void
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l3fwd_em_process_event_vector(struct rte_event_vector *vec,
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struct lcore_conf *qconf, uint16_t *dst_ports)
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{
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const uint8_t attr_valid = vec->attr_valid;
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struct rte_mbuf **mbufs = vec->mbufs;
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int32_t i, j;
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rte_prefetch0(rte_pktmbuf_mtod(mbufs[0], struct rte_ether_hdr *) + 1);
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for (i = 0, j = 1; i < vec->nb_elem; i++, j++) {
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if (j < vec->nb_elem)
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rte_prefetch0(rte_pktmbuf_mtod(mbufs[j],
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struct rte_ether_hdr *) +
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1);
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dst_ports[i] = em_get_dst_port(qconf, mbufs[i],
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attr_valid ? vec->port :
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mbufs[i]->port);
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}
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j = RTE_ALIGN_FLOOR(vec->nb_elem, FWDSTEP);
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for (i = 0; i != j; i += FWDSTEP)
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processx4_step3(&vec->mbufs[i], &dst_ports[i]);
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for (; i < vec->nb_elem; i++)
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process_packet(vec->mbufs[i], &dst_ports[i]);
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process_event_vector(vec, dst_ports);
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}
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#endif /* __L3FWD_EM_SEQUENTIAL_H__ */
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