540914bc7a
Replace the BSD license header with the SPDX tag. Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
126 lines
3.0 KiB
C
126 lines
3.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2015-2018 Atomic Rules LLC
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*/
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#ifndef _ARK_MPU_H_
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#define _ARK_MPU_H_
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#include <stdint.h>
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#include <rte_memory.h>
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/* The MPU or Memory Prefetch Unit is an internal Arkville hardware
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* module for moving data between host memory and the hardware FPGA.
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* This module is *not* intended for end-user manipulation, hence
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* there is minimal documentation.
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*/
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/*
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* MPU hardware structures
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* These are overlay structures to a memory mapped FPGA device. These
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* structs will never be instantiated in ram memory
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*/
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#define ARK_MPU_ID 0x00
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struct ark_mpu_id_t {
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union {
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char id[4];
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uint32_t idnum;
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};
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union {
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char ver[4];
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uint32_t vernum;
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};
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uint32_t phys_id;
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uint32_t mrr_code;
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};
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#define ARK_MPU_HW 0x010
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struct ark_mpu_hw_t {
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uint16_t num_queues;
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uint16_t reserved;
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uint32_t hw_depth;
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uint32_t obj_size;
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uint32_t obj_per_mrr;
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};
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#define ARK_MPU_CFG 0x040
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struct ark_mpu_cfg_t {
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rte_iova_t ring_base; /* rte_iova_t is a uint64_t */
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uint32_t ring_size;
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uint32_t ring_mask;
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uint32_t min_host_move;
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uint32_t min_hw_move;
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volatile uint32_t sw_prod_index;
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volatile uint32_t hw_cons_index;
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volatile uint32_t command;
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};
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enum ARK_MPU_COMMAND {
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MPU_CMD_IDLE = 1,
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MPU_CMD_RUN = 2,
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MPU_CMD_STOP = 4,
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MPU_CMD_RESET = 8,
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MPU_CMD_FORCE_RESET = 16,
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MPU_COMMAND_LIMIT = 0xfFFFFFFF
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};
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#define ARK_MPU_STATS 0x080
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struct ark_mpu_stats_t {
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volatile uint64_t pci_request;
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volatile uint64_t q_empty;
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volatile uint64_t q_q1;
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volatile uint64_t q_q2;
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volatile uint64_t q_q3;
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volatile uint64_t q_q4;
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volatile uint64_t q_full;
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};
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#define ARK_MPU_DEBUG 0x0C0
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struct ark_mpu_debug_t {
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volatile uint32_t state;
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uint32_t reserved;
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volatile uint32_t count;
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volatile uint32_t take;
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volatile uint32_t peek[4];
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};
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/* Consolidated structure */
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struct ark_mpu_t {
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struct ark_mpu_id_t id;
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uint8_t reserved0[(ARK_MPU_HW - ARK_MPU_ID)
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- sizeof(struct ark_mpu_id_t)];
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struct ark_mpu_hw_t hw;
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uint8_t reserved1[(ARK_MPU_CFG - ARK_MPU_HW) -
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sizeof(struct ark_mpu_hw_t)];
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struct ark_mpu_cfg_t cfg;
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uint8_t reserved2[(ARK_MPU_STATS - ARK_MPU_CFG) -
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sizeof(struct ark_mpu_cfg_t)];
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struct ark_mpu_stats_t stats;
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uint8_t reserved3[(ARK_MPU_DEBUG - ARK_MPU_STATS) -
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sizeof(struct ark_mpu_stats_t)];
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struct ark_mpu_debug_t debug;
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};
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uint16_t ark_api_num_queues(struct ark_mpu_t *mpu);
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uint16_t ark_api_num_queues_per_port(struct ark_mpu_t *mpu,
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uint16_t ark_ports);
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int ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size);
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void ark_mpu_stop(struct ark_mpu_t *mpu);
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void ark_mpu_start(struct ark_mpu_t *mpu);
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int ark_mpu_reset(struct ark_mpu_t *mpu);
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int ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring,
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uint32_t ring_size, int is_tx);
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void ark_mpu_dump(struct ark_mpu_t *mpu, const char *msg, uint16_t idx);
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void ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t qid);
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void ark_mpu_reset_stats(struct ark_mpu_t *mpu);
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/* this action is in a performance critical path */
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static inline void
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ark_mpu_set_producer(struct ark_mpu_t *mpu, uint32_t idx)
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{
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mpu->cfg.sw_prod_index = idx;
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}
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#endif
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