f8683231c9
Add a function which makes an MCDI GET_LINK request and packages up the results. Currently, the get-link function is triggered from several entry points which then pass on or store selected parts of the data. When the driver needs to obtain the current link state, it is more efficient to do this in a single call. Signed-off-by: Richard Houldsworth <rhouldsworth@solarflare.com> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
759 lines
19 KiB
C
759 lines
19 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2012-2018 Solarflare Communications Inc.
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* All rights reserved.
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*/
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#include "efx.h"
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#include "efx_impl.h"
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
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static void
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mcdi_phy_decode_cap(
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__in uint32_t mcdi_cap,
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__out uint32_t *maskp)
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{
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uint32_t mask;
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#define CHECK_CAP(_cap) \
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EFX_STATIC_ASSERT(EFX_PHY_CAP_##_cap == MC_CMD_PHY_CAP_##_cap##_LBN)
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CHECK_CAP(10HDX);
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CHECK_CAP(10FDX);
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CHECK_CAP(100HDX);
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CHECK_CAP(100FDX);
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CHECK_CAP(1000HDX);
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CHECK_CAP(1000FDX);
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CHECK_CAP(10000FDX);
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CHECK_CAP(25000FDX);
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CHECK_CAP(40000FDX);
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CHECK_CAP(50000FDX);
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CHECK_CAP(100000FDX);
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CHECK_CAP(PAUSE);
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CHECK_CAP(ASYM);
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CHECK_CAP(AN);
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CHECK_CAP(DDM);
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CHECK_CAP(BASER_FEC);
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CHECK_CAP(BASER_FEC_REQUESTED);
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CHECK_CAP(RS_FEC);
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CHECK_CAP(RS_FEC_REQUESTED);
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CHECK_CAP(25G_BASER_FEC);
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CHECK_CAP(25G_BASER_FEC_REQUESTED);
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#undef CHECK_CAP
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mask = 0;
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
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mask |= (1 << EFX_PHY_CAP_10HDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_10FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
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mask |= (1 << EFX_PHY_CAP_100HDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_100FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
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mask |= (1 << EFX_PHY_CAP_1000HDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_1000FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_10000FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25000FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_25000FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_40000FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_50000FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_50000FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100000FDX_LBN))
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mask |= (1 << EFX_PHY_CAP_100000FDX);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
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mask |= (1 << EFX_PHY_CAP_PAUSE);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
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mask |= (1 << EFX_PHY_CAP_ASYM);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
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mask |= (1 << EFX_PHY_CAP_AN);
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/* FEC caps (supported on Medford2 and later) */
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN))
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mask |= (1 << EFX_PHY_CAP_BASER_FEC);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN))
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mask |= (1 << EFX_PHY_CAP_BASER_FEC_REQUESTED);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_RS_FEC_LBN))
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mask |= (1 << EFX_PHY_CAP_RS_FEC);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN))
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mask |= (1 << EFX_PHY_CAP_RS_FEC_REQUESTED);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN))
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mask |= (1 << EFX_PHY_CAP_25G_BASER_FEC);
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if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN))
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mask |= (1 << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED);
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*maskp = mask;
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}
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static void
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mcdi_phy_decode_link_mode(
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__in efx_nic_t *enp,
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__in uint32_t link_flags,
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__in unsigned int speed,
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__in unsigned int fcntl,
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__in uint32_t fec,
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__out efx_link_mode_t *link_modep,
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__out unsigned int *fcntlp,
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__out efx_phy_fec_type_t *fecp)
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{
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boolean_t fd = !!(link_flags &
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(1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
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boolean_t up = !!(link_flags &
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(1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
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_NOTE(ARGUNUSED(enp))
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if (!up)
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*link_modep = EFX_LINK_DOWN;
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else if (speed == 100000 && fd)
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*link_modep = EFX_LINK_100000FDX;
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else if (speed == 50000 && fd)
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*link_modep = EFX_LINK_50000FDX;
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else if (speed == 40000 && fd)
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*link_modep = EFX_LINK_40000FDX;
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else if (speed == 25000 && fd)
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*link_modep = EFX_LINK_25000FDX;
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else if (speed == 10000 && fd)
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*link_modep = EFX_LINK_10000FDX;
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else if (speed == 1000)
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*link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX;
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else if (speed == 100)
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*link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX;
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else if (speed == 10)
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*link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX;
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else
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*link_modep = EFX_LINK_UNKNOWN;
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if (fcntl == MC_CMD_FCNTL_OFF)
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*fcntlp = 0;
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else if (fcntl == MC_CMD_FCNTL_RESPOND)
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*fcntlp = EFX_FCNTL_RESPOND;
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else if (fcntl == MC_CMD_FCNTL_GENERATE)
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*fcntlp = EFX_FCNTL_GENERATE;
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else if (fcntl == MC_CMD_FCNTL_BIDIR)
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*fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
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else {
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EFSYS_PROBE1(mc_pcol_error, int, fcntl);
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*fcntlp = 0;
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}
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switch (fec) {
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case MC_CMD_FEC_NONE:
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*fecp = EFX_PHY_FEC_NONE;
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break;
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case MC_CMD_FEC_BASER:
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*fecp = EFX_PHY_FEC_BASER;
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break;
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case MC_CMD_FEC_RS:
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*fecp = EFX_PHY_FEC_RS;
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break;
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default:
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EFSYS_PROBE1(mc_pcol_error, int, fec);
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*fecp = EFX_PHY_FEC_NONE;
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break;
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}
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}
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void
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ef10_phy_link_ev(
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__in efx_nic_t *enp,
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__in efx_qword_t *eqp,
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__out efx_link_mode_t *link_modep)
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{
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efx_port_t *epp = &(enp->en_port);
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unsigned int link_flags;
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unsigned int speed;
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unsigned int fcntl;
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efx_phy_fec_type_t fec = MC_CMD_FEC_NONE;
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efx_link_mode_t link_mode;
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uint32_t lp_cap_mask;
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/*
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* Convert the LINKCHANGE speed enumeration into mbit/s, in the
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* same way as GET_LINK encodes the speed
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*/
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switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) {
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case MCDI_EVENT_LINKCHANGE_SPEED_100M:
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speed = 100;
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break;
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case MCDI_EVENT_LINKCHANGE_SPEED_1G:
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speed = 1000;
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break;
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case MCDI_EVENT_LINKCHANGE_SPEED_10G:
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speed = 10000;
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break;
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case MCDI_EVENT_LINKCHANGE_SPEED_25G:
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speed = 25000;
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break;
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case MCDI_EVENT_LINKCHANGE_SPEED_40G:
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speed = 40000;
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break;
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case MCDI_EVENT_LINKCHANGE_SPEED_50G:
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speed = 50000;
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break;
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case MCDI_EVENT_LINKCHANGE_SPEED_100G:
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speed = 100000;
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break;
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default:
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speed = 0;
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break;
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}
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link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
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mcdi_phy_decode_link_mode(enp, link_flags, speed,
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MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
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MC_CMD_FEC_NONE, &link_mode,
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&fcntl, &fec);
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mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
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&lp_cap_mask);
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/*
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* It's safe to update ep_lp_cap_mask without the driver's port lock
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* because presumably any concurrently running efx_port_poll() is
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* only going to arrive at the same value.
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*
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* ep_fcntl has two meanings. It's either the link common fcntl
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* (if the PHY supports AN), or it's the forced link state. If
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* the former, it's safe to update the value for the same reason as
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* for ep_lp_cap_mask. If the latter, then just ignore the value,
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* because we can race with efx_mac_fcntl_set().
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*/
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epp->ep_lp_cap_mask = lp_cap_mask;
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epp->ep_fcntl = fcntl;
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*link_modep = link_mode;
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}
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__checkReturn efx_rc_t
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ef10_phy_power(
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__in efx_nic_t *enp,
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__in boolean_t power)
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{
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efx_rc_t rc;
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if (!power)
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return (0);
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/* Check if the PHY is a zombie */
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if ((rc = ef10_phy_verify(enp)) != 0)
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goto fail1;
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enp->en_reset_flags |= EFX_RESET_PHY;
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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__checkReturn efx_rc_t
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ef10_phy_get_link(
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__in efx_nic_t *enp,
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__out ef10_link_state_t *elsp)
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{
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efx_mcdi_req_t req;
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uint32_t fec;
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EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN,
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MC_CMD_GET_LINK_OUT_V2_LEN);
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efx_rc_t rc;
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req.emr_cmd = MC_CMD_GET_LINK;
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req.emr_in_buf = payload;
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req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
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req.emr_out_buf = payload;
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req.emr_out_length = MC_CMD_GET_LINK_OUT_V2_LEN;
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efx_mcdi_execute(enp, &req);
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if (req.emr_rc != 0) {
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rc = req.emr_rc;
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goto fail1;
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}
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if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) {
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rc = EMSGSIZE;
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goto fail2;
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}
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mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
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&elsp->epls.epls_adv_cap_mask);
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mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
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&elsp->epls.epls_lp_cap_mask);
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if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_V2_LEN)
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fec = MC_CMD_FEC_NONE;
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else
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fec = MCDI_OUT_DWORD(req, GET_LINK_OUT_V2_FEC_TYPE);
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mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
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MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
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MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
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fec, &elsp->epls.epls_link_mode,
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&elsp->epls.epls_fcntl, &elsp->epls.epls_fec);
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if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_V2_LEN) {
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elsp->epls.epls_ld_cap_mask = 0;
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} else {
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mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_V2_LD_CAP),
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&elsp->epls.epls_ld_cap_mask);
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}
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#if EFSYS_OPT_LOOPBACK
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/*
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* MC_CMD_LOOPBACK and EFX_LOOPBACK names are equivalent, so use the
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* MCDI value directly. Agreement is checked in efx_loopback_mask().
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*/
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elsp->els_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE);
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#endif /* EFSYS_OPT_LOOPBACK */
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elsp->els_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0;
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return (0);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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__checkReturn efx_rc_t
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ef10_phy_reconfigure(
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__in efx_nic_t *enp)
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{
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efx_port_t *epp = &(enp->en_port);
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efx_mcdi_req_t req;
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EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_LINK_IN_LEN,
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MC_CMD_SET_LINK_OUT_LEN);
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uint32_t cap_mask;
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#if EFSYS_OPT_PHY_LED_CONTROL
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unsigned int led_mode;
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#endif
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unsigned int speed;
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boolean_t supported;
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efx_rc_t rc;
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if ((rc = efx_mcdi_link_control_supported(enp, &supported)) != 0)
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goto fail1;
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if (supported == B_FALSE)
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goto out;
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req.emr_cmd = MC_CMD_SET_LINK;
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req.emr_in_buf = payload;
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req.emr_in_length = MC_CMD_SET_LINK_IN_LEN;
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req.emr_out_buf = payload;
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req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN;
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cap_mask = epp->ep_adv_cap_mask;
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MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP,
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PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1,
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PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1,
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PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1,
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PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1,
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PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1,
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PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1,
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PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1,
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PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1,
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PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1,
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PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);
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/* Too many fields for for POPULATE macros, so insert this afterwards */
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_25000FDX, (cap_mask >> EFX_PHY_CAP_25000FDX) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_50000FDX, (cap_mask >> EFX_PHY_CAP_50000FDX) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_100000FDX, (cap_mask >> EFX_PHY_CAP_100000FDX) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_BASER_FEC, (cap_mask >> EFX_PHY_CAP_BASER_FEC) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_BASER_FEC_REQUESTED,
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(cap_mask >> EFX_PHY_CAP_BASER_FEC_REQUESTED) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_RS_FEC, (cap_mask >> EFX_PHY_CAP_RS_FEC) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_RS_FEC_REQUESTED,
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(cap_mask >> EFX_PHY_CAP_RS_FEC_REQUESTED) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_25G_BASER_FEC,
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(cap_mask >> EFX_PHY_CAP_25G_BASER_FEC) & 0x1);
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MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
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PHY_CAP_25G_BASER_FEC_REQUESTED,
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(cap_mask >> EFX_PHY_CAP_25G_BASER_FEC_REQUESTED) & 0x1);
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#if EFSYS_OPT_LOOPBACK
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MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
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epp->ep_loopback_type);
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switch (epp->ep_loopback_link_mode) {
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case EFX_LINK_100FDX:
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speed = 100;
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break;
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case EFX_LINK_1000FDX:
|
|
speed = 1000;
|
|
break;
|
|
case EFX_LINK_10000FDX:
|
|
speed = 10000;
|
|
break;
|
|
case EFX_LINK_25000FDX:
|
|
speed = 25000;
|
|
break;
|
|
case EFX_LINK_40000FDX:
|
|
speed = 40000;
|
|
break;
|
|
case EFX_LINK_50000FDX:
|
|
speed = 50000;
|
|
break;
|
|
case EFX_LINK_100000FDX:
|
|
speed = 100000;
|
|
break;
|
|
default:
|
|
speed = 0;
|
|
}
|
|
#else
|
|
MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE);
|
|
speed = 0;
|
|
#endif /* EFSYS_OPT_LOOPBACK */
|
|
MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
|
|
|
|
#if EFSYS_OPT_PHY_FLAGS
|
|
MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
|
|
#else
|
|
MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
|
|
#endif /* EFSYS_OPT_PHY_FLAGS */
|
|
|
|
efx_mcdi_execute(enp, &req);
|
|
|
|
if (req.emr_rc != 0) {
|
|
rc = req.emr_rc;
|
|
goto fail2;
|
|
}
|
|
|
|
/* And set the blink mode */
|
|
(void) memset(payload, 0, sizeof (payload));
|
|
req.emr_cmd = MC_CMD_SET_ID_LED;
|
|
req.emr_in_buf = payload;
|
|
req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN;
|
|
req.emr_out_buf = payload;
|
|
req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN;
|
|
|
|
#if EFSYS_OPT_PHY_LED_CONTROL
|
|
switch (epp->ep_phy_led_mode) {
|
|
case EFX_PHY_LED_DEFAULT:
|
|
led_mode = MC_CMD_LED_DEFAULT;
|
|
break;
|
|
case EFX_PHY_LED_OFF:
|
|
led_mode = MC_CMD_LED_OFF;
|
|
break;
|
|
case EFX_PHY_LED_ON:
|
|
led_mode = MC_CMD_LED_ON;
|
|
break;
|
|
default:
|
|
EFSYS_ASSERT(0);
|
|
led_mode = MC_CMD_LED_DEFAULT;
|
|
}
|
|
|
|
MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode);
|
|
#else
|
|
MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT);
|
|
#endif /* EFSYS_OPT_PHY_LED_CONTROL */
|
|
|
|
efx_mcdi_execute(enp, &req);
|
|
|
|
if (req.emr_rc != 0) {
|
|
rc = req.emr_rc;
|
|
goto fail3;
|
|
}
|
|
out:
|
|
return (0);
|
|
|
|
fail3:
|
|
EFSYS_PROBE(fail3);
|
|
fail2:
|
|
EFSYS_PROBE(fail2);
|
|
fail1:
|
|
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_phy_verify(
|
|
__in efx_nic_t *enp)
|
|
{
|
|
efx_mcdi_req_t req;
|
|
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_STATE_IN_LEN,
|
|
MC_CMD_GET_PHY_STATE_OUT_LEN);
|
|
uint32_t state;
|
|
efx_rc_t rc;
|
|
|
|
req.emr_cmd = MC_CMD_GET_PHY_STATE;
|
|
req.emr_in_buf = payload;
|
|
req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN;
|
|
req.emr_out_buf = payload;
|
|
req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN;
|
|
|
|
efx_mcdi_execute(enp, &req);
|
|
|
|
if (req.emr_rc != 0) {
|
|
rc = req.emr_rc;
|
|
goto fail1;
|
|
}
|
|
|
|
if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) {
|
|
rc = EMSGSIZE;
|
|
goto fail2;
|
|
}
|
|
|
|
state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE);
|
|
if (state != MC_CMD_PHY_STATE_OK) {
|
|
if (state != MC_CMD_PHY_STATE_ZOMBIE)
|
|
EFSYS_PROBE1(mc_pcol_error, int, state);
|
|
rc = ENOTACTIVE;
|
|
goto fail3;
|
|
}
|
|
|
|
return (0);
|
|
|
|
fail3:
|
|
EFSYS_PROBE(fail3);
|
|
fail2:
|
|
EFSYS_PROBE(fail2);
|
|
fail1:
|
|
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_phy_oui_get(
|
|
__in efx_nic_t *enp,
|
|
__out uint32_t *ouip)
|
|
{
|
|
_NOTE(ARGUNUSED(enp, ouip))
|
|
|
|
return (ENOTSUP);
|
|
}
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_phy_link_state_get(
|
|
__in efx_nic_t *enp,
|
|
__out efx_phy_link_state_t *eplsp)
|
|
{
|
|
efx_rc_t rc;
|
|
ef10_link_state_t els;
|
|
|
|
/* Obtain the active link state */
|
|
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
|
|
goto fail1;
|
|
|
|
*eplsp = els.epls;
|
|
|
|
return (0);
|
|
|
|
fail1:
|
|
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
|
|
#if EFSYS_OPT_PHY_STATS
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_phy_stats_update(
|
|
__in efx_nic_t *enp,
|
|
__in efsys_mem_t *esmp,
|
|
__inout_ecount(EFX_PHY_NSTATS) uint32_t *stat)
|
|
{
|
|
/* TBD: no stats support in firmware yet */
|
|
_NOTE(ARGUNUSED(enp, esmp))
|
|
memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat));
|
|
|
|
return (0);
|
|
}
|
|
|
|
#endif /* EFSYS_OPT_PHY_STATS */
|
|
|
|
#if EFSYS_OPT_BIST
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_bist_enable_offline(
|
|
__in efx_nic_t *enp)
|
|
{
|
|
efx_rc_t rc;
|
|
|
|
if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0)
|
|
goto fail1;
|
|
|
|
return (0);
|
|
|
|
fail1:
|
|
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_bist_start(
|
|
__in efx_nic_t *enp,
|
|
__in efx_bist_type_t type)
|
|
{
|
|
efx_rc_t rc;
|
|
|
|
if ((rc = efx_mcdi_bist_start(enp, type)) != 0)
|
|
goto fail1;
|
|
|
|
return (0);
|
|
|
|
fail1:
|
|
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
__checkReturn efx_rc_t
|
|
ef10_bist_poll(
|
|
__in efx_nic_t *enp,
|
|
__in efx_bist_type_t type,
|
|
__out efx_bist_result_t *resultp,
|
|
__out_opt __drv_when(count > 0, __notnull)
|
|
uint32_t *value_maskp,
|
|
__out_ecount_opt(count) __drv_when(count > 0, __notnull)
|
|
unsigned long *valuesp,
|
|
__in size_t count)
|
|
{
|
|
/*
|
|
* MCDI_CTL_SDU_LEN_MAX_V1 is large enough cover all BIST results,
|
|
* whilst not wasting stack.
|
|
*/
|
|
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_POLL_BIST_IN_LEN,
|
|
MCDI_CTL_SDU_LEN_MAX_V1);
|
|
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
|
|
efx_mcdi_req_t req;
|
|
uint32_t value_mask = 0;
|
|
uint32_t result;
|
|
efx_rc_t rc;
|
|
|
|
EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_LEN <=
|
|
MCDI_CTL_SDU_LEN_MAX_V1);
|
|
EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_SFT9001_LEN <=
|
|
MCDI_CTL_SDU_LEN_MAX_V1);
|
|
EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MRSFP_LEN <=
|
|
MCDI_CTL_SDU_LEN_MAX_V1);
|
|
EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MEM_LEN <=
|
|
MCDI_CTL_SDU_LEN_MAX_V1);
|
|
|
|
_NOTE(ARGUNUSED(type))
|
|
|
|
req.emr_cmd = MC_CMD_POLL_BIST;
|
|
req.emr_in_buf = payload;
|
|
req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;
|
|
req.emr_out_buf = payload;
|
|
req.emr_out_length = MCDI_CTL_SDU_LEN_MAX_V1;
|
|
|
|
efx_mcdi_execute(enp, &req);
|
|
|
|
if (req.emr_rc != 0) {
|
|
rc = req.emr_rc;
|
|
goto fail1;
|
|
}
|
|
|
|
if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {
|
|
rc = EMSGSIZE;
|
|
goto fail2;
|
|
}
|
|
|
|
if (count > 0)
|
|
(void) memset(valuesp, '\0', count * sizeof (unsigned long));
|
|
|
|
result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);
|
|
|
|
if (result == MC_CMD_POLL_BIST_FAILED &&
|
|
req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN &&
|
|
count > EFX_BIST_MEM_ECC_FATAL) {
|
|
if (valuesp != NULL) {
|
|
valuesp[EFX_BIST_MEM_TEST] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST);
|
|
valuesp[EFX_BIST_MEM_ADDR] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR);
|
|
valuesp[EFX_BIST_MEM_BUS] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS);
|
|
valuesp[EFX_BIST_MEM_EXPECT] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT);
|
|
valuesp[EFX_BIST_MEM_ACTUAL] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL);
|
|
valuesp[EFX_BIST_MEM_ECC] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC);
|
|
valuesp[EFX_BIST_MEM_ECC_PARITY] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY);
|
|
valuesp[EFX_BIST_MEM_ECC_FATAL] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL);
|
|
}
|
|
value_mask |= (1 << EFX_BIST_MEM_TEST) |
|
|
(1 << EFX_BIST_MEM_ADDR) |
|
|
(1 << EFX_BIST_MEM_BUS) |
|
|
(1 << EFX_BIST_MEM_EXPECT) |
|
|
(1 << EFX_BIST_MEM_ACTUAL) |
|
|
(1 << EFX_BIST_MEM_ECC) |
|
|
(1 << EFX_BIST_MEM_ECC_PARITY) |
|
|
(1 << EFX_BIST_MEM_ECC_FATAL);
|
|
} else if (result == MC_CMD_POLL_BIST_FAILED &&
|
|
encp->enc_phy_type == EFX_PHY_XFI_FARMI &&
|
|
req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&
|
|
count > EFX_BIST_FAULT_CODE) {
|
|
if (valuesp != NULL)
|
|
valuesp[EFX_BIST_FAULT_CODE] =
|
|
MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);
|
|
value_mask |= 1 << EFX_BIST_FAULT_CODE;
|
|
}
|
|
|
|
if (value_maskp != NULL)
|
|
*value_maskp = value_mask;
|
|
|
|
EFSYS_ASSERT(resultp != NULL);
|
|
if (result == MC_CMD_POLL_BIST_RUNNING)
|
|
*resultp = EFX_BIST_RESULT_RUNNING;
|
|
else if (result == MC_CMD_POLL_BIST_PASSED)
|
|
*resultp = EFX_BIST_RESULT_PASSED;
|
|
else
|
|
*resultp = EFX_BIST_RESULT_FAILED;
|
|
|
|
return (0);
|
|
|
|
fail2:
|
|
EFSYS_PROBE(fail2);
|
|
fail1:
|
|
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
|
|
|
return (rc);
|
|
}
|
|
|
|
void
|
|
ef10_bist_stop(
|
|
__in efx_nic_t *enp,
|
|
__in efx_bist_type_t type)
|
|
{
|
|
/* There is no way to stop BIST on EF10. */
|
|
_NOTE(ARGUNUSED(enp, type))
|
|
}
|
|
|
|
#endif /* EFSYS_OPT_BIST */
|
|
|
|
#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
|