ba641f2076
The setup and configuration of the PMD is not performance sensitive, but is not thread safe either. It is possible that the multiple read/writes during PMD setup and configuration could be corrupted in a multi-thread environment. Since this is not performance sensitive, the developer can choose to add their own layer to provide thread-safe setup and configuration. It is expected that, in most applications, the initial configuration of the network ports would be done by a single thread at startup. In the case of exception on the event queue, the event queue and corresponding Rx/Tx queue should be restarted in the Rx/Tx queue polling context. These operations require access to the device control which should be serialized. The device level lock will do the job. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@solarflare.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
58 lines
2.3 KiB
C
58 lines
2.3 KiB
C
/*-
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* Copyright (c) 2016 Solarflare Communications Inc.
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* All rights reserved.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SFC_DEBUG_H_
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#define _SFC_DEBUG_H_
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#include <rte_debug.h>
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#ifdef RTE_LIBRTE_SFC_EFX_DEBUG
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/* Avoid dependency from RTE_LOG_LEVEL to be able to enable debug check
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* in the driver only.
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*/
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#define SFC_ASSERT(exp) RTE_VERIFY(exp)
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#else
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/* If the driver debug is not enabled, follow DPDK debug/non-debug */
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#define SFC_ASSERT(exp) RTE_ASSERT(exp)
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#endif
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/* Log PMD message, automatically add prefix and \n */
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#define sfc_panic(sa, fmt, args...) \
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do { \
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const struct rte_eth_dev *_dev = (sa)->eth_dev; \
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const struct rte_pci_device *_pci_dev = SFC_DEV_TO_PCI(_dev); \
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\
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rte_panic("sfc " PCI_PRI_FMT " #%" PRIu8 ": " fmt "\n", \
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_pci_dev->addr.domain, _pci_dev->addr.bus, \
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_pci_dev->addr.devid, _pci_dev->addr.function,\
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_dev->data->port_id, ##args); \
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} while (0)
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#endif /* _SFC_DEBUG_H_ */
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