37f9b54bd3
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
62 lines
2.5 KiB
C
62 lines
2.5 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
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* Copyright 2017 NXP.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Freescale Semiconductor, Inc nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __DPDK_RXTX_H__
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#define __DPDK_RXTX_H__
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/* internal offset from where IC is copied to packet buffer*/
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#define DEFAULT_ICIOF 32
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/* IC transfer size */
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#define DEFAULT_ICSZ 48
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/* IC offsets from buffer header address */
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#define DEFAULT_RX_ICEOF 16
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#define DPAA_MAX_DEQUEUE_NUM_FRAMES 63
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/** <Maximum number of frames to be dequeued in a single rx call*/
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/* FD structure masks and offset */
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#define DPAA_FD_FORMAT_MASK 0xE0000000
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#define DPAA_FD_OFFSET_MASK 0x1FF00000
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#define DPAA_FD_LENGTH_MASK 0xFFFFF
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#define DPAA_FD_FORMAT_SHIFT 29
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#define DPAA_FD_OFFSET_SHIFT 20
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uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
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uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
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uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused,
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struct rte_mbuf **bufs __rte_unused,
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uint16_t nb_bufs __rte_unused);
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#endif
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