b84ad85188
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
25 lines
578 B
Plaintext
25 lines
578 B
Plaintext
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2017 Cavium, Inc
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#
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#include "common_linuxapp"
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CONFIG_RTE_MACHINE="armv8a"
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CONFIG_RTE_ARCH="arm64"
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CONFIG_RTE_ARCH_ARM64=y
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CONFIG_RTE_ARCH_64=y
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CONFIG_RTE_FORCE_INTRINSICS=y
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# Maximum available cache line size in arm64 implementations.
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# Setting to maximum available cache line size in generic config
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# to address minimum DMA alignment across all arm64 implementations.
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CONFIG_RTE_CACHE_LINE_SIZE=128
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CONFIG_RTE_LIBRTE_FM10K_PMD=n
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CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
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CONFIG_RTE_LIBRTE_AVP_PMD=n
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CONFIG_RTE_SCHED_VECTOR=n
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