f5880e1f29
This adds a helper to get the rte_intr_handle from the virtio_hw. This is safe to do since the usage of the helper is guarded by RTE_ETH_DEV_INTR_LSC which is only set if we found a PCI device during initialization. Signed-off-by: Jan Blunck <jblunck@infradead.org> Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
327 lines
12 KiB
C
327 lines
12 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _VIRTIO_PCI_H_
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#define _VIRTIO_PCI_H_
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#include <stdint.h>
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#include <rte_pci.h>
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#include <rte_ethdev.h>
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struct virtqueue;
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struct virtnet_ctl;
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/* VirtIO PCI vendor/device ID. */
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#define VIRTIO_PCI_VENDORID 0x1AF4
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#define VIRTIO_PCI_LEGACY_DEVICEID_NET 0x1000
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#define VIRTIO_PCI_MODERN_DEVICEID_NET 0x1041
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/* VirtIO ABI version, this must match exactly. */
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#define VIRTIO_PCI_ABI_VERSION 0
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/*
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* VirtIO Header, located in BAR 0.
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*/
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#define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/
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#define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */
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#define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */
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#define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */
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#define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */
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#define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */
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#define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */
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#define VIRTIO_PCI_ISR 19 /* interrupt status register, reading
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* also clears the register (8, RO) */
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/* Only if MSIX is enabled: */
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#define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */
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#define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications
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(16, RW) */
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/* The bit of the ISR which indicates a device has an interrupt. */
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#define VIRTIO_PCI_ISR_INTR 0x1
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/* The bit of the ISR which indicates a device configuration change. */
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#define VIRTIO_PCI_ISR_CONFIG 0x2
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/* Vector value used to disable MSI for queue. */
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#define VIRTIO_MSI_NO_VECTOR 0xFFFF
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/* VirtIO device IDs. */
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#define VIRTIO_ID_NETWORK 0x01
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#define VIRTIO_ID_BLOCK 0x02
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#define VIRTIO_ID_CONSOLE 0x03
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#define VIRTIO_ID_ENTROPY 0x04
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#define VIRTIO_ID_BALLOON 0x05
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#define VIRTIO_ID_IOMEMORY 0x06
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#define VIRTIO_ID_9P 0x09
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/* Status byte for guest to report progress. */
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#define VIRTIO_CONFIG_STATUS_RESET 0x00
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#define VIRTIO_CONFIG_STATUS_ACK 0x01
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#define VIRTIO_CONFIG_STATUS_DRIVER 0x02
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#define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04
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#define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08
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#define VIRTIO_CONFIG_STATUS_FAILED 0x80
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/*
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* Each virtqueue indirect descriptor list must be physically contiguous.
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* To allow us to malloc(9) each list individually, limit the number
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* supported to what will fit in one page. With 4KB pages, this is a limit
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* of 256 descriptors. If there is ever a need for more, we can switch to
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* contigmalloc(9) for the larger allocations, similar to what
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* bus_dmamem_alloc(9) does.
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*
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* Note the sizeof(struct vring_desc) is 16 bytes.
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*/
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#define VIRTIO_MAX_INDIRECT ((int) (PAGE_SIZE / 16))
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/* The feature bitmap for virtio net */
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#define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */
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#define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */
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#define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */
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#define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */
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#define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */
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#define VIRTIO_NET_F_GUEST_ECN 9 /* Guest can handle TSO[6] w/ ECN in. */
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#define VIRTIO_NET_F_GUEST_UFO 10 /* Guest can handle UFO in. */
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#define VIRTIO_NET_F_HOST_TSO4 11 /* Host can handle TSOv4 in. */
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#define VIRTIO_NET_F_HOST_TSO6 12 /* Host can handle TSOv6 in. */
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#define VIRTIO_NET_F_HOST_ECN 13 /* Host can handle TSO[6] w/ ECN in. */
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#define VIRTIO_NET_F_HOST_UFO 14 /* Host can handle UFO in. */
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#define VIRTIO_NET_F_MRG_RXBUF 15 /* Host can merge receive buffers. */
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#define VIRTIO_NET_F_STATUS 16 /* virtio_net_config.status available */
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#define VIRTIO_NET_F_CTRL_VQ 17 /* Control channel available */
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#define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */
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#define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */
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#define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */
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#define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the
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* network */
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#define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow
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* Steering */
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#define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */
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/* Do we get callbacks when the ring is completely used, even if we've
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* suppressed them? */
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#define VIRTIO_F_NOTIFY_ON_EMPTY 24
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/* Can the device handle any descriptor layout? */
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#define VIRTIO_F_ANY_LAYOUT 27
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/* We support indirect buffer descriptors */
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#define VIRTIO_RING_F_INDIRECT_DESC 28
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#define VIRTIO_F_VERSION_1 32
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#define VIRTIO_F_IOMMU_PLATFORM 33
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/*
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* Some VirtIO feature bits (currently bits 28 through 31) are
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* reserved for the transport being used (eg. virtio_ring), the
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* rest are per-device feature bits.
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*/
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#define VIRTIO_TRANSPORT_F_START 28
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#define VIRTIO_TRANSPORT_F_END 34
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/* The Guest publishes the used index for which it expects an interrupt
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* at the end of the avail ring. Host should ignore the avail->flags field. */
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/* The Host publishes the avail index for which it expects a kick
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* at the end of the used ring. Guest should ignore the used->flags field. */
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#define VIRTIO_RING_F_EVENT_IDX 29
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#define VIRTIO_NET_S_LINK_UP 1 /* Link is up */
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#define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */
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/*
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* Maximum number of virtqueues per device.
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*/
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#define VIRTIO_MAX_VIRTQUEUES 8
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/* Common configuration */
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#define VIRTIO_PCI_CAP_COMMON_CFG 1
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/* Notifications */
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#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
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/* ISR Status */
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#define VIRTIO_PCI_CAP_ISR_CFG 3
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/* Device specific configuration */
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#define VIRTIO_PCI_CAP_DEVICE_CFG 4
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/* PCI configuration access */
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#define VIRTIO_PCI_CAP_PCI_CFG 5
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/* This is the PCI capability header: */
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struct virtio_pci_cap {
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uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
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uint8_t cap_next; /* Generic PCI field: next ptr. */
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uint8_t cap_len; /* Generic PCI field: capability length */
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uint8_t cfg_type; /* Identifies the structure. */
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uint8_t bar; /* Where to find it. */
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uint8_t padding[3]; /* Pad to full dword. */
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uint32_t offset; /* Offset within bar. */
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uint32_t length; /* Length of the structure, in bytes. */
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};
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struct virtio_pci_notify_cap {
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struct virtio_pci_cap cap;
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uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
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};
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/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
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struct virtio_pci_common_cfg {
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/* About the whole device. */
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uint32_t device_feature_select; /* read-write */
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uint32_t device_feature; /* read-only */
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uint32_t guest_feature_select; /* read-write */
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uint32_t guest_feature; /* read-write */
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uint16_t msix_config; /* read-write */
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uint16_t num_queues; /* read-only */
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uint8_t device_status; /* read-write */
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uint8_t config_generation; /* read-only */
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/* About a specific virtqueue. */
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uint16_t queue_select; /* read-write */
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uint16_t queue_size; /* read-write, power of 2. */
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uint16_t queue_msix_vector; /* read-write */
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uint16_t queue_enable; /* read-write */
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uint16_t queue_notify_off; /* read-only */
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uint32_t queue_desc_lo; /* read-write */
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uint32_t queue_desc_hi; /* read-write */
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uint32_t queue_avail_lo; /* read-write */
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uint32_t queue_avail_hi; /* read-write */
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uint32_t queue_used_lo; /* read-write */
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uint32_t queue_used_hi; /* read-write */
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};
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struct virtio_hw;
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struct virtio_pci_ops {
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void (*read_dev_cfg)(struct virtio_hw *hw, size_t offset,
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void *dst, int len);
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void (*write_dev_cfg)(struct virtio_hw *hw, size_t offset,
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const void *src, int len);
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void (*reset)(struct virtio_hw *hw);
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uint8_t (*get_status)(struct virtio_hw *hw);
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void (*set_status)(struct virtio_hw *hw, uint8_t status);
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uint64_t (*get_features)(struct virtio_hw *hw);
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void (*set_features)(struct virtio_hw *hw, uint64_t features);
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uint8_t (*get_isr)(struct virtio_hw *hw);
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uint16_t (*set_config_irq)(struct virtio_hw *hw, uint16_t vec);
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uint16_t (*get_queue_num)(struct virtio_hw *hw, uint16_t queue_id);
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int (*setup_queue)(struct virtio_hw *hw, struct virtqueue *vq);
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void (*del_queue)(struct virtio_hw *hw, struct virtqueue *vq);
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void (*notify_queue)(struct virtio_hw *hw, struct virtqueue *vq);
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};
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struct virtio_net_config;
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struct virtio_hw {
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struct virtnet_ctl *cvq;
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struct rte_pci_ioport io;
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uint64_t req_guest_features;
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uint64_t guest_features;
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uint32_t max_queue_pairs;
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uint16_t vtnet_hdr_size;
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uint8_t vlan_strip;
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uint8_t use_msix;
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uint8_t modern;
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uint8_t use_simple_rxtx;
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uint8_t mac_addr[ETHER_ADDR_LEN];
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uint32_t notify_off_multiplier;
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uint8_t *isr;
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uint16_t *notify_base;
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struct rte_pci_device *dev;
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struct virtio_pci_common_cfg *common_cfg;
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struct virtio_net_config *dev_cfg;
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const struct virtio_pci_ops *vtpci_ops;
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void *virtio_user_dev;
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struct virtqueue **vqs;
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};
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/*
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* This structure is just a reference to read
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* net device specific config space; it just a chodu structure
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*
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*/
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struct virtio_net_config {
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/* The config defining mac address (if VIRTIO_NET_F_MAC) */
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uint8_t mac[ETHER_ADDR_LEN];
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/* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */
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uint16_t status;
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uint16_t max_virtqueue_pairs;
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} __attribute__((packed));
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/*
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* How many bits to shift physical queue address written to QUEUE_PFN.
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* 12 is historical, and due to x86 page size.
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*/
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#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
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/* The alignment to use between consumer and producer parts of vring. */
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#define VIRTIO_PCI_VRING_ALIGN 4096
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static inline int
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vtpci_with_feature(struct virtio_hw *hw, uint64_t bit)
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{
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return (hw->guest_features & (1ULL << bit)) != 0;
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}
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/*
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* Function declaration from virtio_pci.c
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*/
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int vtpci_init(struct rte_pci_device *, struct virtio_hw *,
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uint32_t *dev_flags);
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void vtpci_reset(struct virtio_hw *);
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void vtpci_reinit_complete(struct virtio_hw *);
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uint8_t vtpci_get_status(struct virtio_hw *);
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void vtpci_set_status(struct virtio_hw *, uint8_t);
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uint64_t vtpci_negotiate_features(struct virtio_hw *, uint64_t);
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void vtpci_write_dev_config(struct virtio_hw *, size_t, const void *, int);
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void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int);
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uint8_t vtpci_isr(struct virtio_hw *);
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uint16_t vtpci_irq_config(struct virtio_hw *, uint16_t);
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static inline struct rte_intr_handle *
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vtpci_intr_handle(struct virtio_hw *hw)
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{
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return hw->dev ? &hw->dev->intr_handle : NULL;
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}
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#endif /* _VIRTIO_PCI_H_ */
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