c1077933d4
This code was added 7+ years ago in
commit fb022b85ba
("timer: check TSC reliability")
presumably when variant TSCs were still somewhat common.
But this code doesn't do anything except print a warning,
and the warning doesn't give any kind of advice to the user,
so let's just remove it.
While the warning has no functional meaning, the /proc/cpuinfo
parsing consumes a non-trivial amount of time which is especially
noticeable in secondary processes.
On my test system, it consumes 21ms out of the 66ms total execution
time for rte_eal_init() in a secondary process.
Signed-off-by: Jim Harris <james.r.harris@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
233 lines
5.7 KiB
C
233 lines
5.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation.
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* Copyright(c) 2012-2013 6WIND S.A.
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*/
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#include <string.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <sys/mman.h>
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#include <sys/queue.h>
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#include <pthread.h>
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#include <errno.h>
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#include <rte_common.h>
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#include <rte_log.h>
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#include <rte_cycles.h>
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#include <rte_lcore.h>
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#include <rte_memory.h>
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#include <rte_eal.h>
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#include <rte_debug.h>
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#include "eal_private.h"
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#include "eal_internal_cfg.h"
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enum timer_source eal_timer_source = EAL_TIMER_HPET;
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#ifdef RTE_LIBEAL_USE_HPET
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#define DEV_HPET "/dev/hpet"
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/* Maximum number of counters. */
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#define HPET_TIMER_NUM 3
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/* General capabilities register */
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#define CLK_PERIOD_SHIFT 32 /* Clock period shift. */
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#define CLK_PERIOD_MASK 0xffffffff00000000ULL /* Clock period mask. */
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/**
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* HPET timer registers. From the Intel IA-PC HPET (High Precision Event
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* Timers) Specification.
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*/
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struct eal_hpet_regs {
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/* Memory-mapped, software visible registers */
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uint64_t capabilities; /**< RO General Capabilities Register. */
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uint64_t reserved0; /**< Reserved for future use. */
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uint64_t config; /**< RW General Configuration Register. */
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uint64_t reserved1; /**< Reserved for future use. */
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uint64_t isr; /**< RW Clear General Interrupt Status. */
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uint64_t reserved2[25]; /**< Reserved for future use. */
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union {
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uint64_t counter; /**< RW Main Counter Value Register. */
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struct {
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uint32_t counter_l; /**< RW Main Counter Low. */
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uint32_t counter_h; /**< RW Main Counter High. */
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};
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};
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uint64_t reserved3; /**< Reserved for future use. */
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struct {
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uint64_t config; /**< RW Timer Config and Capability Reg. */
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uint64_t comp; /**< RW Timer Comparator Value Register. */
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uint64_t fsb; /**< RW FSB Interrupt Route Register. */
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uint64_t reserved4; /**< Reserved for future use. */
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} timers[HPET_TIMER_NUM]; /**< Set of HPET timers. */
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};
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/* Mmap'd hpet registers */
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static volatile struct eal_hpet_regs *eal_hpet = NULL;
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/* Period at which the HPET counter increments in
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* femtoseconds (10^-15 seconds). */
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static uint32_t eal_hpet_resolution_fs = 0;
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/* Frequency of the HPET counter in Hz */
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static uint64_t eal_hpet_resolution_hz = 0;
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/* Incremented 4 times during one 32bits hpet full count */
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static uint32_t eal_hpet_msb;
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static pthread_t msb_inc_thread_id;
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/*
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* This function runs on a specific thread to update a global variable
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* containing used to process MSB of the HPET (unfortunately, we need
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* this because hpet is 32 bits by default under linux).
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*/
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static void *
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hpet_msb_inc(__attribute__((unused)) void *arg)
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{
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uint32_t t;
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while (1) {
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t = (eal_hpet->counter_l >> 30);
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if (t != (eal_hpet_msb & 3))
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eal_hpet_msb ++;
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sleep(10);
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}
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return NULL;
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}
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uint64_t
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rte_get_hpet_hz(void)
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{
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if(internal_config.no_hpet)
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rte_panic("Error, HPET called, but no HPET present\n");
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return eal_hpet_resolution_hz;
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}
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uint64_t
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rte_get_hpet_cycles(void)
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{
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uint32_t t, msb;
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uint64_t ret;
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if(internal_config.no_hpet)
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rte_panic("Error, HPET called, but no HPET present\n");
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t = eal_hpet->counter_l;
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msb = eal_hpet_msb;
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ret = (msb + 2 - (t >> 30)) / 4;
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ret <<= 32;
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ret += t;
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return ret;
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}
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#endif
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#ifdef RTE_LIBEAL_USE_HPET
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/*
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* Open and mmap /dev/hpet (high precision event timer) that will
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* provide our time reference.
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*/
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int
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rte_eal_hpet_init(int make_default)
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{
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int fd, ret;
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if (internal_config.no_hpet) {
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RTE_LOG(NOTICE, EAL, "HPET is disabled\n");
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return -1;
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}
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fd = open(DEV_HPET, O_RDONLY);
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if (fd < 0) {
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RTE_LOG(ERR, EAL, "ERROR: Cannot open "DEV_HPET": %s!\n",
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strerror(errno));
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internal_config.no_hpet = 1;
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return -1;
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}
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eal_hpet = mmap(NULL, 1024, PROT_READ, MAP_SHARED, fd, 0);
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if (eal_hpet == MAP_FAILED) {
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RTE_LOG(ERR, EAL, "ERROR: Cannot mmap "DEV_HPET"!\n"
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"Please enable CONFIG_HPET_MMAP in your kernel configuration "
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"to allow HPET support.\n"
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"To run without using HPET, set CONFIG_RTE_LIBEAL_USE_HPET=n "
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"in your build configuration or use '--no-hpet' EAL flag.\n");
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close(fd);
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internal_config.no_hpet = 1;
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return -1;
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}
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close(fd);
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eal_hpet_resolution_fs = (uint32_t)((eal_hpet->capabilities &
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CLK_PERIOD_MASK) >>
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CLK_PERIOD_SHIFT);
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eal_hpet_resolution_hz = (1000ULL*1000ULL*1000ULL*1000ULL*1000ULL) /
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(uint64_t)eal_hpet_resolution_fs;
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RTE_LOG(INFO, EAL, "HPET frequency is ~%"PRIu64" kHz\n",
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eal_hpet_resolution_hz/1000);
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eal_hpet_msb = (eal_hpet->counter_l >> 30);
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/* create a thread that will increment a global variable for
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* msb (hpet is 32 bits by default under linux) */
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ret = rte_ctrl_thread_create(&msb_inc_thread_id, "hpet-msb-inc", NULL,
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hpet_msb_inc, NULL);
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if (ret != 0) {
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RTE_LOG(ERR, EAL, "ERROR: Cannot create HPET timer thread!\n");
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internal_config.no_hpet = 1;
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return -1;
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}
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if (make_default)
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eal_timer_source = EAL_TIMER_HPET;
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return 0;
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}
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#endif
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uint64_t
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get_tsc_freq(void)
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{
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#ifdef CLOCK_MONOTONIC_RAW
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#define NS_PER_SEC 1E9
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#define CYC_PER_10MHZ 1E7
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struct timespec sleeptime = {.tv_nsec = NS_PER_SEC / 10 }; /* 1/10 second */
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struct timespec t_start, t_end;
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uint64_t tsc_hz;
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if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
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uint64_t ns, end, start = rte_rdtsc();
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nanosleep(&sleeptime,NULL);
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clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
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end = rte_rdtsc();
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ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
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ns += (t_end.tv_nsec - t_start.tv_nsec);
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double secs = (double)ns/NS_PER_SEC;
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tsc_hz = (uint64_t)((end - start)/secs);
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/* Round up to 10Mhz. 1E7 ~ 10Mhz */
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return RTE_ALIGN_MUL_NEAR(tsc_hz, CYC_PER_10MHZ);
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}
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#endif
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return 0;
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}
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int
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rte_eal_timer_init(void)
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{
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eal_timer_source = EAL_TIMER_TSC;
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set_tsc_freq();
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return 0;
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}
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