fdf20fa7be
CACHE_LINE_SIZE is a macro defined in machine/param.h in FreeBSD and conflicts with DPDK macro version. Adding RTE_ prefix to avoid conflicts. CACHE_LINE_MASK and CACHE_LINE_ROUNDUP are also prefixed. Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com> [Thomas: updated on HEAD, including PPC]
204 lines
6.3 KiB
C
204 lines
6.3 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rte_table_stub.h>
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#include <rte_table_lpm.h>
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#include <rte_table_lpm_ipv6.h>
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#include <rte_table_hash.h>
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#include <rte_table_array.h>
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#include <rte_pipeline.h>
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#ifdef RTE_LIBRTE_ACL
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#include <rte_table_acl.h>
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#endif
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#include <rte_port_ring.h>
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#include <rte_port_ethdev.h>
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#include <rte_port_source_sink.h>
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#ifndef TEST_TABLE_H_
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#define TEST_TABLE_H_
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#define RING_SIZE 4096
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#define MAX_BULK 32
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#define N 65536
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#define TIME_S 5
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#define TEST_RING_FULL_EMTPY_ITER 8
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#define N_PORTS 2
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#define N_PKTS 2
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#define N_PKTS_EXT 6
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#define RING_RX rings_rx[0]
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#define RING_RX_2 rings_rx[1]
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#define RING_TX rings_tx[0]
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#define RING_TX_2 rings_tx[1]
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#define PORT_RX_RING_SIZE 128
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#define PORT_TX_RING_SIZE 512
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#define RING_RX_SIZE 128
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#define RING_TX_SIZE 128
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#define POOL_BUFFER_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
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#define POOL_SIZE (32 * 1024)
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#define POOL_CACHE_SIZE 256
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#define BURST_SIZE 8
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#define WORKER_TYPE 1
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#define MAX_DUMMY_PORTS 2
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#define MP_NAME "dummy_port_mempool"
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#define MBUF_COUNT (8000 * MAX_DUMMY_PORTS)
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#define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
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#define MP_CACHE_SZ 256
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#define MP_SOCKET 0
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#define MP_FLAGS 0
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/* Macros */
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#define RING_ENQUEUE(ring, value) do { \
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struct rte_mbuf *m; \
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uint32_t *k32, *signature; \
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uint8_t *key; \
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\
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m = rte_pktmbuf_alloc(pool); \
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if (m == NULL) \
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return -1; \
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signature = RTE_MBUF_METADATA_UINT32_PTR(m, 0); \
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key = RTE_MBUF_METADATA_UINT8_PTR(m, 32); \
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k32 = (uint32_t *) key; \
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k32[0] = (value); \
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*signature = pipeline_test_hash(key, 0, 0); \
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rte_ring_enqueue((ring), m); \
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} while (0)
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#define RUN_PIPELINE(pipeline) do { \
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rte_pipeline_run((pipeline)); \
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rte_pipeline_flush((pipeline)); \
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} while (0)
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#define VERIFY(var, value) do { \
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if ((var) != -(value)) \
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return var; \
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} while (0)
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#define VERIFY_TRAFFIC(ring, sent, expected) do { \
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unsigned i, n = 0; \
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void *mbuf = NULL; \
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\
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for (i = 0; i < (sent); i++) { \
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if (!rte_ring_dequeue((ring), &mbuf)) { \
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if (mbuf == NULL) \
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continue; \
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n++; \
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rte_pktmbuf_free((struct rte_mbuf *)mbuf); \
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} \
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else \
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break; \
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} \
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printf("Expected %d, got %d\n", expected, n); \
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if (n != (expected)) { \
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return -21; \
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} \
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} while (0)
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/* Function definitions */
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uint64_t pipeline_test_hash(
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void *key,
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__attribute__((unused)) uint32_t key_size,
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__attribute__((unused)) uint64_t seed);
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/* Extern variables */
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extern struct rte_pipeline *p;
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extern struct rte_ring *rings_rx[N_PORTS];
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extern struct rte_ring *rings_tx[N_PORTS];
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extern struct rte_mempool *pool;
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extern uint32_t port_in_id[N_PORTS];
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extern uint32_t port_out_id[N_PORTS];
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extern uint32_t port_out_id_type[3];
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extern uint32_t table_id[N_PORTS*2];
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extern uint64_t override_hit_mask;
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extern uint64_t override_miss_mask;
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extern uint64_t non_reserved_actions_hit;
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extern uint64_t non_reserved_actions_miss;
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extern uint8_t connect_miss_action_to_port_out;
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extern uint8_t connect_miss_action_to_table;
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extern uint32_t table_entry_default_action;
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extern uint32_t table_entry_hit_action;
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extern uint32_t table_entry_miss_action;
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extern rte_pipeline_port_in_action_handler port_in_action;
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extern rte_pipeline_port_out_action_handler port_out_action;
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extern rte_pipeline_table_action_handler_hit action_handler_hit;
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extern rte_pipeline_table_action_handler_miss action_handler_miss;
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/* Global data types */
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struct manage_ops {
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uint32_t op_id;
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void *op_data;
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int expected_result;
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};
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/* Internal pipeline structures */
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struct rte_port_in {
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struct rte_port_in_ops ops;
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uint32_t burst_size;
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uint32_t table_id;
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void *h_port;
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};
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struct rte_port_out {
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struct rte_port_out_ops ops;
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void *h_port;
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};
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struct rte_table {
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struct rte_table_ops ops;
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rte_pipeline_table_action_handler_hit f_action;
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uint32_t table_next_id;
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uint32_t table_next_id_valid;
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uint8_t actions_lookup_miss[RTE_CACHE_LINE_SIZE];
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uint32_t action_data_size;
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void *h_table;
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};
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#define RTE_PIPELINE_MAX_NAME_SZ 124
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struct rte_pipeline {
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char name[RTE_PIPELINE_MAX_NAME_SZ];
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uint32_t socket_id;
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struct rte_port_in ports_in[16];
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struct rte_port_out ports_out[16];
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struct rte_table tables[64];
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uint32_t num_ports_in;
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uint32_t num_ports_out;
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uint32_t num_tables;
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struct rte_mbuf *pkts[RTE_PORT_IN_BURST_SIZE_MAX];
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struct rte_table_entry *actions[RTE_PORT_IN_BURST_SIZE_MAX];
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uint64_t mask_action[64];
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uint32_t mask_actions;
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};
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#endif
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