Tianfei Zhang 5548d7e5a2 raw/ifpga/base: clear pending bit
Every defined bit in FME_ERROR0 is RW1C. Other reserved bits are always
0 when readout and it will plan to be RW1C if needed in future.
So it is safe just write the read back value to clear all the errors.

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>
2019-11-20 17:36:05 +01:00
..
2019-11-20 17:36:05 +01:00
2019-07-30 15:36:35 +02:00