CACHE_LINE_SIZE is a macro defined in machine/param.h in FreeBSD and conflicts with DPDK macro version. Adding RTE_ prefix to avoid conflicts. CACHE_LINE_MASK and CACHE_LINE_ROUNDUP are also prefixed. Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com> [Thomas: updated on HEAD, including PPC]
386 lines
9.9 KiB
C
386 lines
9.9 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <rte_common.h>
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#include <rte_byteorder.h>
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#include <rte_log.h>
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#include <rte_malloc.h>
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#include <rte_ethdev.h>
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#include <rte_mbuf.h>
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#include <rte_ether.h>
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#include <rte_ip.h>
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#include <rte_jhash.h>
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#include <rte_port_ethdev.h>
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#include <rte_port_ring.h>
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#include <rte_table_stub.h>
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#include <rte_pipeline.h>
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#include "main.h"
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struct app_core_rx_message_handle_params {
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struct rte_ring *ring_req;
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struct rte_ring *ring_resp;
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struct rte_pipeline *p;
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uint32_t *port_in_id;
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};
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static void
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app_message_handle(struct app_core_rx_message_handle_params *params);
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static int
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app_pipeline_rx_port_in_action_handler(struct rte_mbuf **pkts, uint32_t n,
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uint64_t *pkts_mask, void *arg);
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void
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app_main_loop_pipeline_rx(void) {
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struct rte_pipeline *p;
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uint32_t port_in_id[APP_MAX_PORTS];
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uint32_t port_out_id[APP_MAX_PORTS];
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uint32_t table_id[APP_MAX_PORTS];
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uint32_t i;
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uint32_t core_id = rte_lcore_id();
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struct app_core_params *core_params = app_get_core_params(core_id);
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struct app_core_rx_message_handle_params mh_params;
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if ((core_params == NULL) || (core_params->core_type != APP_CORE_RX))
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rte_panic("Core %u misconfiguration\n", core_id);
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RTE_LOG(INFO, USER1, "Core %u is doing RX\n", core_id);
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/* Pipeline configuration */
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struct rte_pipeline_params pipeline_params = {
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.name = "pipeline",
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.socket_id = rte_socket_id(),
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};
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p = rte_pipeline_create(&pipeline_params);
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if (p == NULL)
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rte_panic("%s: Unable to configure the pipeline\n", __func__);
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/* Input port configuration */
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for (i = 0; i < app.n_ports; i++) {
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struct rte_port_ethdev_reader_params port_ethdev_params = {
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.port_id = app.ports[i],
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.queue_id = 0,
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};
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struct rte_pipeline_port_in_params port_params = {
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.ops = &rte_port_ethdev_reader_ops,
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.arg_create = (void *) &port_ethdev_params,
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.f_action = app_pipeline_rx_port_in_action_handler,
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.arg_ah = NULL,
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.burst_size = app.bsz_hwq_rd,
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};
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if (rte_pipeline_port_in_create(p, &port_params,
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&port_in_id[i]))
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rte_panic("%s: Unable to configure input port for "
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"port %d\n", __func__, app.ports[i]);
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}
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/* Output port configuration */
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for (i = 0; i < app.n_ports; i++) {
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struct rte_port_ring_writer_params port_ring_params = {
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.ring = app.rings[core_params->swq_out[i]],
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.tx_burst_sz = app.bsz_swq_wr,
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};
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struct rte_pipeline_port_out_params port_params = {
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.ops = &rte_port_ring_writer_ops,
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.arg_create = (void *) &port_ring_params,
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.f_action = NULL,
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.f_action_bulk = NULL,
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.arg_ah = NULL,
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};
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if (rte_pipeline_port_out_create(p, &port_params,
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&port_out_id[i]))
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rte_panic("%s: Unable to configure output port for "
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"ring RX %i\n", __func__, i);
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}
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/* Table configuration */
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for (i = 0; i < app.n_ports; i++) {
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struct rte_pipeline_table_params table_params = {
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.ops = &rte_table_stub_ops,
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.arg_create = NULL,
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.f_action_hit = NULL,
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.f_action_miss = NULL,
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.arg_ah = NULL,
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.action_data_size = 0,
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};
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if (rte_pipeline_table_create(p, &table_params, &table_id[i]))
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rte_panic("%s: Unable to configure table %u\n",
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__func__, table_id[i]);
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}
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/* Interconnecting ports and tables */
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for (i = 0; i < app.n_ports; i++)
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if (rte_pipeline_port_in_connect_to_table(p, port_in_id[i],
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table_id[i]))
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rte_panic("%s: Unable to connect input port %u to "
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"table %u\n", __func__, port_in_id[i],
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table_id[i]);
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/* Add entries to tables */
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for (i = 0; i < app.n_ports; i++) {
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struct rte_pipeline_table_entry default_entry = {
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.action = RTE_PIPELINE_ACTION_PORT,
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{.port_id = port_out_id[i]},
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};
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struct rte_pipeline_table_entry *default_entry_ptr;
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if (rte_pipeline_table_default_entry_add(p, table_id[i],
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&default_entry, &default_entry_ptr))
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rte_panic("%s: Unable to add default entry to "
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"table %u\n", __func__, table_id[i]);
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}
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/* Enable input ports */
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for (i = 0; i < app.n_ports; i++)
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if (rte_pipeline_port_in_enable(p, port_in_id[i]))
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rte_panic("Unable to enable input port %u\n",
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port_in_id[i]);
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/* Check pipeline consistency */
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if (rte_pipeline_check(p) < 0)
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rte_panic("%s: Pipeline consistency check failed\n", __func__);
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/* Message handling */
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mh_params.ring_req =
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app_get_ring_req(app_get_first_core_id(APP_CORE_RX));
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mh_params.ring_resp =
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app_get_ring_resp(app_get_first_core_id(APP_CORE_RX));
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mh_params.p = p;
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mh_params.port_in_id = port_in_id;
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/* Run-time */
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for (i = 0; ; i++) {
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rte_pipeline_run(p);
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if ((i & APP_FLUSH) == 0) {
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rte_pipeline_flush(p);
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app_message_handle(&mh_params);
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}
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}
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}
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uint64_t test_hash(
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void *key,
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__attribute__((unused)) uint32_t key_size,
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__attribute__((unused)) uint64_t seed)
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{
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struct app_flow_key *flow_key = (struct app_flow_key *) key;
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uint32_t ip_dst = rte_be_to_cpu_32(flow_key->ip_dst);
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uint64_t signature = (ip_dst & 0x00FFFFFFLLU) >> 2;
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return signature;
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}
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uint32_t
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rte_jhash2_16(uint32_t *k, uint32_t initval)
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{
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uint32_t a, b, c;
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a = b = RTE_JHASH_GOLDEN_RATIO;
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c = initval;
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a += k[0];
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b += k[1];
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c += k[2];
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__rte_jhash_mix(a, b, c);
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c += 16; /* length in bytes */
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a += k[3]; /* Remaining word */
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__rte_jhash_mix(a, b, c);
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return c;
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}
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static inline void
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app_pkt_metadata_fill(struct rte_mbuf *m)
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{
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uint8_t *m_data = rte_pktmbuf_mtod(m, uint8_t *);
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struct app_pkt_metadata *c =
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(struct app_pkt_metadata *) RTE_MBUF_METADATA_UINT8_PTR(m, 0);
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struct ipv4_hdr *ip_hdr =
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(struct ipv4_hdr *) &m_data[sizeof(struct ether_hdr)];
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uint64_t *ipv4_hdr_slab = (uint64_t *) ip_hdr;
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/* TTL and Header Checksum are set to 0 */
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c->flow_key.slab0 = ipv4_hdr_slab[1] & 0xFFFFFFFF0000FF00LLU;
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c->flow_key.slab1 = ipv4_hdr_slab[2];
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c->signature = test_hash((void *) &c->flow_key, 0, 0);
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/* Pop Ethernet header */
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if (app.ether_hdr_pop_push) {
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rte_pktmbuf_adj(m, (uint16_t)sizeof(struct ether_hdr));
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m->l2_len = 0;
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m->l3_len = sizeof(struct ipv4_hdr);
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}
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}
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int
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app_pipeline_rx_port_in_action_handler(
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struct rte_mbuf **pkts,
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uint32_t n,
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uint64_t *pkts_mask,
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__rte_unused void *arg)
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{
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uint32_t i;
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for (i = 0; i < n; i++) {
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struct rte_mbuf *m = pkts[i];
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app_pkt_metadata_fill(m);
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}
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*pkts_mask = (~0LLU) >> (64 - n);
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return 0;
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}
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void
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app_main_loop_rx(void) {
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struct app_mbuf_array *ma;
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uint32_t i, j;
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int ret;
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uint32_t core_id = rte_lcore_id();
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struct app_core_params *core_params = app_get_core_params(core_id);
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if ((core_params == NULL) || (core_params->core_type != APP_CORE_RX))
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rte_panic("Core %u misconfiguration\n", core_id);
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RTE_LOG(INFO, USER1, "Core %u is doing RX (no pipeline)\n", core_id);
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ma = rte_malloc_socket(NULL, sizeof(struct app_mbuf_array),
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RTE_CACHE_LINE_SIZE, rte_socket_id());
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if (ma == NULL)
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rte_panic("%s: cannot allocate buffer space\n", __func__);
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for (i = 0; ; i = ((i + 1) & (app.n_ports - 1))) {
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uint32_t n_mbufs;
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n_mbufs = rte_eth_rx_burst(
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app.ports[i],
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0,
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ma->array,
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app.bsz_hwq_rd);
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if (n_mbufs == 0)
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continue;
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for (j = 0; j < n_mbufs; j++) {
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struct rte_mbuf *m = ma->array[j];
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app_pkt_metadata_fill(m);
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}
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do {
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ret = rte_ring_sp_enqueue_bulk(
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app.rings[core_params->swq_out[i]],
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(void **) ma->array,
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n_mbufs);
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} while (ret < 0);
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}
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}
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void
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app_message_handle(struct app_core_rx_message_handle_params *params)
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{
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struct rte_ring *ring_req = params->ring_req;
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struct rte_ring *ring_resp;
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void *msg;
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struct app_msg_req *req;
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struct app_msg_resp *resp;
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struct rte_pipeline *p;
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uint32_t *port_in_id;
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int result;
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/* Read request message */
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result = rte_ring_sc_dequeue(ring_req, &msg);
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if (result != 0)
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return;
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ring_resp = params->ring_resp;
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p = params->p;
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port_in_id = params->port_in_id;
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/* Handle request */
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req = (struct app_msg_req *)rte_ctrlmbuf_data((struct rte_mbuf *)msg);
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switch (req->type) {
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case APP_MSG_REQ_PING:
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{
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result = 0;
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break;
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}
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case APP_MSG_REQ_RX_PORT_ENABLE:
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{
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result = rte_pipeline_port_in_enable(p,
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port_in_id[req->rx_up.port]);
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break;
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}
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case APP_MSG_REQ_RX_PORT_DISABLE:
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{
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result = rte_pipeline_port_in_disable(p,
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port_in_id[req->rx_down.port]);
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break;
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}
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default:
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rte_panic("RX Unrecognized message type (%u)\n", req->type);
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}
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/* Fill in response message */
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resp = (struct app_msg_resp *)rte_ctrlmbuf_data((struct rte_mbuf *)msg);
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resp->result = result;
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/* Send response */
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do {
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result = rte_ring_sp_enqueue(ring_resp, msg);
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} while (result == -ENOBUFS);
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}
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