5bcd7b5d2f
The lower 16 bits of EICR register are used for queue interrupts, dpdk framework take over the first bit for other interrupts like LSC, so there're only 15 bits left for queue interrupts mapping. This patch adds a check for the num of interrupt queues at dev_start. Signed-off-by: Wang Xiao W <xiao.w.wang@intel.com> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com> |
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