486 lines
14 KiB
C
486 lines
14 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <locale.h>
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#include <unistd.h>
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#include <limits.h>
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#include <getopt.h>
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#include <rte_log.h>
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#include <rte_eal.h>
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#include <rte_lcore.h>
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#include <rte_string_fns.h>
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#include "main.h"
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#define APP_NAME "qos_sched"
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#define MAX_OPT_VALUES 8
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#define SYS_CPU_DIR "/sys/devices/system/cpu/cpu%u/topology/"
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static uint32_t app_master_core = 1;
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static uint32_t app_numa_mask;
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static uint64_t app_used_core_mask = 0;
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static uint64_t app_used_port_mask = 0;
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static uint64_t app_used_rx_port_mask = 0;
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static uint64_t app_used_tx_port_mask = 0;
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static const char usage[] =
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" \n"
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" %s <APP PARAMS> \n"
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" \n"
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"Application mandatory parameters: \n"
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" --pfc \"RX PORT, TX PORT, RX LCORE, WT LCORE\" : Packet flow configuration \n"
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" multiple pfc can be configured in command line \n"
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" \n"
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"Application optional parameters: \n"
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" --i : run in interactive mode (default value is %u) \n"
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" --mst I : master core index (default value is %u) \n"
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" --rsz \"A, B, C\" : Ring sizes \n"
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" A = Size (in number of buffer descriptors) of each of the NIC RX \n"
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" rings read by the I/O RX lcores (default value is %u) \n"
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" B = Size (in number of elements) of each of the SW rings used by the\n"
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" I/O RX lcores to send packets to worker lcores (default value is\n"
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" %u) \n"
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" C = Size (in number of buffer descriptors) of each of the NIC TX \n"
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" rings written by worker lcores (default value is %u) \n"
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" --bsz \"A, B, C, D\": Burst sizes \n"
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" A = I/O RX lcore read burst size from NIC RX (default value is %u) \n"
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" B = I/O RX lcore write burst size to output SW rings, \n"
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" Worker lcore read burst size from input SW rings, \n"
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" QoS enqueue size (default value is %u) \n"
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" C = QoS dequeue size (default value is %u) \n"
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" D = Worker lcore write burst size to NIC TX (default value is %u) \n"
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" --msz M : Mempool size (in number of mbufs) for each pfc (default %u) \n"
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" --rth \"A, B, C\" : RX queue threshold parameters \n"
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" A = RX prefetch threshold (default value is %u) \n"
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" B = RX host threshold (default value is %u) \n"
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" C = RX write-back threshold (default value is %u) \n"
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" --tth \"A, B, C\" : TX queue threshold parameters \n"
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" A = TX prefetch threshold (default value is %u) \n"
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" B = TX host threshold (default value is %u) \n"
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" C = TX write-back threshold (default value is %u) \n"
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" --cfg FILE : profile configuration to load \n"
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;
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/* display usage */
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static void
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app_usage(const char *prgname)
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{
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printf(usage, prgname, APP_INTERACTIVE_DEFAULT, app_master_core,
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APP_RX_DESC_DEFAULT, APP_RING_SIZE, APP_TX_DESC_DEFAULT,
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MAX_PKT_RX_BURST, PKT_ENQUEUE, PKT_DEQUEUE,
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MAX_PKT_TX_BURST, NB_MBUF,
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RX_PTHRESH, RX_HTHRESH, RX_WTHRESH,
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TX_PTHRESH, TX_HTHRESH, TX_WTHRESH
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);
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}
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static inline int str_is(const char *str, const char *is)
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{
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return (strcmp(str, is) == 0);
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}
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/* returns core mask used by DPDK */
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static uint64_t
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app_eal_core_mask(void)
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{
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uint32_t i;
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uint64_t cm = 0;
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struct rte_config *cfg = rte_eal_get_configuration();
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for (i = 0; i < RTE_MAX_LCORE; i++) {
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if (cfg->lcore_role[i] == ROLE_RTE)
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cm |= (1ULL << i);
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}
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cm |= (1ULL << cfg->master_lcore);
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return cm;
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}
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/* returns total number of cores presented in a system */
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static uint32_t
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app_cpu_core_count(void)
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{
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int i, len;
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char path[PATH_MAX];
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uint32_t ncores = 0;
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for(i = 0; i < RTE_MAX_LCORE; i++) {
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len = snprintf(path, sizeof(path), SYS_CPU_DIR, i);
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if (len <= 0 || (unsigned)len >= sizeof(path))
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continue;
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if (access(path, F_OK) == 0)
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ncores++;
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}
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return ncores;
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}
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/* returns:
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number of values parsed
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-1 in case of error
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*/
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static int
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app_parse_opt_vals(const char *conf_str, char separator, uint32_t n_vals, uint32_t *opt_vals)
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{
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char *string;
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uint32_t i, n_tokens;
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char *tokens[MAX_OPT_VALUES];
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if (conf_str == NULL || opt_vals == NULL || n_vals == 0 || n_vals > MAX_OPT_VALUES)
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return -1;
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/* duplicate configuration string before splitting it to tokens */
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string = strdup(conf_str);
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if (string == NULL)
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return -1;
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n_tokens = rte_strsplit(string, strnlen(string, 32), tokens, n_vals, separator);
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for(i = 0; i < n_tokens; i++) {
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opt_vals[i] = (uint32_t)atol(tokens[i]);
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}
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free(string);
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return n_tokens;
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}
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static int
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app_parse_ring_conf(const char *conf_str)
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{
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int ret;
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uint32_t vals[3];
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ret = app_parse_opt_vals(conf_str, ',', 3, vals);
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if (ret != 3)
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return ret;
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ring_conf.rx_size = vals[0];
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ring_conf.ring_size = vals[1];
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ring_conf.tx_size = vals[2];
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return 0;
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}
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static int
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app_parse_rth_conf(const char *conf_str)
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{
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int ret;
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uint32_t vals[3];
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ret = app_parse_opt_vals(conf_str, ',', 3, vals);
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if (ret != 3)
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return ret;
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rx_thresh.pthresh = (uint8_t)vals[0];
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rx_thresh.hthresh = (uint8_t)vals[1];
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rx_thresh.wthresh = (uint8_t)vals[2];
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return 0;
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}
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static int
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app_parse_tth_conf(const char *conf_str)
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{
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int ret;
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uint32_t vals[3];
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ret = app_parse_opt_vals(conf_str, ',', 3, vals);
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if (ret != 3)
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return ret;
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tx_thresh.pthresh = (uint8_t)vals[0];
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tx_thresh.hthresh = (uint8_t)vals[1];
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tx_thresh.wthresh = (uint8_t)vals[2];
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return 0;
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}
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static int
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app_parse_flow_conf(const char *conf_str)
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{
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int ret;
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uint32_t vals[5];
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struct flow_conf *pconf;
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uint64_t mask;
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ret = app_parse_opt_vals(conf_str, ',', 6, vals);
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if (ret < 4 || ret > 5)
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return ret;
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pconf = &qos_conf[nb_pfc];
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pconf->rx_port = (uint8_t)vals[0];
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pconf->tx_port = (uint8_t)vals[1];
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pconf->rx_core = (uint8_t)vals[2];
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pconf->wt_core = (uint8_t)vals[3];
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if (ret == 5)
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pconf->tx_core = (uint8_t)vals[4];
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else
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pconf->tx_core = pconf->wt_core;
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if (pconf->rx_core == pconf->wt_core) {
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RTE_LOG(ERR, APP, "pfc %u: rx thread and worker thread cannot share same core\n", nb_pfc);
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return -1;
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}
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if (pconf->rx_port >= RTE_MAX_ETHPORTS) {
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RTE_LOG(ERR, APP, "pfc %u: invalid rx port %"PRIu8" index\n",
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nb_pfc, pconf->rx_port);
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return -1;
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}
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if (pconf->tx_port >= RTE_MAX_ETHPORTS) {
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RTE_LOG(ERR, APP, "pfc %u: invalid tx port %"PRIu8" index\n",
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nb_pfc, pconf->rx_port);
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return -1;
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}
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mask = 1lu << pconf->rx_port;
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if (app_used_rx_port_mask & mask) {
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RTE_LOG(ERR, APP, "pfc %u: rx port %"PRIu8" is used already\n",
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nb_pfc, pconf->rx_port);
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return -1;
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}
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app_used_rx_port_mask |= mask;
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app_used_port_mask |= mask;
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mask = 1lu << pconf->tx_port;
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if (app_used_tx_port_mask & mask) {
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RTE_LOG(ERR, APP, "pfc %u: port %"PRIu8" is used already\n",
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nb_pfc, pconf->tx_port);
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return -1;
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}
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app_used_tx_port_mask |= mask;
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app_used_port_mask |= mask;
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mask = 1lu << pconf->rx_core;
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app_used_core_mask |= mask;
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mask = 1lu << pconf->wt_core;
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app_used_core_mask |= mask;
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mask = 1lu << pconf->tx_core;
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app_used_core_mask |= mask;
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nb_pfc++;
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return 0;
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}
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static int
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app_parse_burst_conf(const char *conf_str)
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{
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int ret;
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uint32_t vals[4];
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ret = app_parse_opt_vals(conf_str, ',', 4, vals);
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if (ret != 4)
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return ret;
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burst_conf.rx_burst = (uint16_t)vals[0];
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burst_conf.ring_burst = (uint16_t)vals[1];
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burst_conf.qos_dequeue = (uint16_t)vals[2];
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burst_conf.tx_burst = (uint16_t)vals[3];
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return 0;
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}
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/*
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* Parses the argument given in the command line of the application,
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* calculates mask for used cores and initializes EAL with calculated core mask
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*/
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int
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app_parse_args(int argc, char **argv)
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{
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int opt, ret;
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int option_index;
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const char *optname;
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char *prgname = argv[0];
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uint32_t i, nb_lcores;
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static struct option lgopts[] = {
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{ "pfc", 1, 0, 0 },
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{ "mst", 1, 0, 0 },
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{ "rsz", 1, 0, 0 },
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{ "bsz", 1, 0, 0 },
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{ "msz", 1, 0, 0 },
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{ "rth", 1, 0, 0 },
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{ "tth", 1, 0, 0 },
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{ "cfg", 1, 0, 0 },
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{ NULL, 0, 0, 0 }
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};
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/* initialize EAL first */
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ret = rte_eal_init(argc, argv);
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if (ret < 0)
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return -1;
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argc -= ret;
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argv += ret;
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/* set en_US locale to print big numbers with ',' */
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setlocale(LC_NUMERIC, "en_US.utf-8");
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while ((opt = getopt_long(argc, argv, "i",
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lgopts, &option_index)) != EOF) {
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switch (opt) {
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case 'i':
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printf("Interactive-mode selected\n");
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interactive = 1;
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break;
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/* long options */
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case 0:
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optname = lgopts[option_index].name;
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if (str_is(optname, "pfc")) {
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ret = app_parse_flow_conf(optarg);
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if (ret) {
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RTE_LOG(ERR, APP, "Invalid pipe configuration %s\n", optarg);
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return -1;
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}
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break;
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}
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if (str_is(optname, "mst")) {
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app_master_core = (uint32_t)atoi(optarg);
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break;
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}
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if (str_is(optname, "rsz")) {
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ret = app_parse_ring_conf(optarg);
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if (ret) {
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RTE_LOG(ERR, APP, "Invalid ring configuration %s\n", optarg);
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return -1;
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}
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break;
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}
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if (str_is(optname, "bsz")) {
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ret = app_parse_burst_conf(optarg);
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if (ret) {
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RTE_LOG(ERR, APP, "Invalid burst configuration %s\n", optarg);
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return -1;
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}
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break;
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}
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if (str_is(optname, "msz")) {
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mp_size = atoi(optarg);
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if (mp_size <= 0) {
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RTE_LOG(ERR, APP, "Invalid mempool size %s\n", optarg);
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return -1;
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}
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break;
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}
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if (str_is(optname, "rth")) {
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ret = app_parse_rth_conf(optarg);
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if (ret) {
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RTE_LOG(ERR, APP, "Invalid RX threshold configuration %s\n", optarg);
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return -1;
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}
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break;
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}
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if (str_is(optname, "tth")) {
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ret = app_parse_tth_conf(optarg);
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if (ret) {
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RTE_LOG(ERR, APP, "Invalid TX threshold configuration %s\n", optarg);
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return -1;
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}
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break;
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}
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if (str_is(optname, "cfg")) {
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cfg_profile = optarg;
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break;
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}
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break;
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default:
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app_usage(prgname);
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return -1;
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}
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}
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/* check master core index validity */
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for(i = 0; i <= app_master_core; i++) {
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if (app_used_core_mask & (1u << app_master_core)) {
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RTE_LOG(ERR, APP, "Master core index is not configured properly\n");
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app_usage(prgname);
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return -1;
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}
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}
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app_used_core_mask |= 1u << app_master_core;
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if ((app_used_core_mask != app_eal_core_mask()) ||
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(app_master_core != rte_get_master_lcore())) {
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RTE_LOG(ERR, APP, "EAL core mask not configured properly, must be %" PRIx64
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" instead of %" PRIx64 "\n" , app_used_core_mask, app_eal_core_mask());
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return -1;
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}
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if (nb_pfc == 0) {
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RTE_LOG(ERR, APP, "Packet flow not configured!\n");
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app_usage(prgname);
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return -1;
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}
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/* sanity check for cores assignment */
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nb_lcores = app_cpu_core_count();
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for(i = 0; i < nb_pfc; i++) {
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if (qos_conf[i].rx_core >= nb_lcores) {
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RTE_LOG(ERR, APP, "pfc %u: invalid RX lcore index %u\n", i + 1,
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qos_conf[i].rx_core);
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return -1;
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}
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if (qos_conf[i].wt_core >= nb_lcores) {
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RTE_LOG(ERR, APP, "pfc %u: invalid WT lcore index %u\n", i + 1,
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qos_conf[i].wt_core);
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return -1;
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}
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uint32_t rx_sock = rte_lcore_to_socket_id(qos_conf[i].rx_core);
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uint32_t wt_sock = rte_lcore_to_socket_id(qos_conf[i].wt_core);
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if (rx_sock != wt_sock) {
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RTE_LOG(ERR, APP, "pfc %u: RX and WT must be on the same socket\n", i + 1);
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return -1;
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}
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app_numa_mask |= 1 << rte_lcore_to_socket_id(qos_conf[i].rx_core);
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}
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return 0;
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}
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