3037e6cf3d
DMA on SN1022 SoC requires extra mapping of the memory via MCDI. Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru> Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
58 lines
1.1 KiB
C
58 lines
1.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2021 Xilinx, Inc.
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*/
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#ifndef _SFC_NIC_DMA_DP_H
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#define _SFC_NIC_DMA_DP_H
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#include <rte_common.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SFC_NIC_DMA_REGIONS_MAX 2
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struct sfc_nic_dma_region {
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rte_iova_t nic_base;
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rte_iova_t trgt_base;
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rte_iova_t trgt_end;
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};
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/** Driver cache for NIC DMA regions */
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struct sfc_nic_dma_info {
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struct sfc_nic_dma_region regions[SFC_NIC_DMA_REGIONS_MAX];
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unsigned int nb_regions;
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};
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static inline rte_iova_t
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sfc_nic_dma_map(const struct sfc_nic_dma_info *nic_dma_info,
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rte_iova_t trgt_addr, size_t len)
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{
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unsigned int i;
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for (i = 0; i < nic_dma_info->nb_regions; i++) {
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const struct sfc_nic_dma_region *region;
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region = &nic_dma_info->regions[i];
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/*
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* Do not sum trgt_addr and len to avoid overflow
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* checking.
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*/
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if (region->trgt_base <= trgt_addr &&
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trgt_addr <= region->trgt_end &&
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len <= region->trgt_end - trgt_addr) {
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return region->nic_base +
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(trgt_addr - region->trgt_base);
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}
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}
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return RTE_BAD_IOVA;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SFC_NIC_DMA_DP_H */
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