014a9e222b
Add routines for SoC model identification and HW IO handling routines specific to CN9K and CN10K Marvell SoC's. These are based on arm64 ISA and behaviour specific to Marvell SoC's. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com> Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
15 lines
251 B
C
15 lines
251 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef _ROC_UTIL_PRIV_H_
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#define _ROC_UTIL_PRIV_H_
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enum util_err_status {
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UTIL_ERR_PARAM = -6000,
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UTIL_ERR_FS,
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UTIL_ERR_INVALID_MODEL,
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};
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#endif /* _ROC_UTIL_PRIV_H_ */
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