76522b25b1
If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will evaluate to incorrect values due to unintended sign extension from int to unsigned long. To fix this, add UL suffix to the constants in these macros. The same problem is with AQMQ_QSZX() macro also. Coverity issue: 349899, 349905, 349911, 349921, 349923 Fixes:32e4930d5a("crypto/nitrox: add hardware queue management") Fixes:0a8fc2423b("crypto/nitrox: introduce Nitrox driver") Cc: stable@dpdk.org Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#ifndef _NITROX_CSR_H_
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#define _NITROX_CSR_H_
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#include <rte_common.h>
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#include <rte_io.h>
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#define CSR_DELAY 30
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#define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))
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/* NPS packet registers */
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#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078UL + ((_i) * 0x40000UL))
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#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088UL + ((_i) * 0x40000UL))
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#define NPS_PKT_SLC_CTLX(_i) (0x10000UL + ((_i) * 0x40000UL))
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#define NPS_PKT_SLC_CNTSX(_i) (0x10008UL + ((_i) * 0x40000UL))
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#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010UL + ((_i) * 0x40000UL))
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/* AQM Virtual Function Registers */
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#define AQMQ_QSZX(_i) (0x20008UL + ((_i) * 0x40000UL))
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static inline uint64_t
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nitrox_read_csr(uint8_t *bar_addr, uint64_t offset)
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{
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return rte_read64(bar_addr + offset);
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}
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static inline void
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nitrox_write_csr(uint8_t *bar_addr, uint64_t offset, uint64_t value)
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{
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rte_write64(value, (bar_addr + offset));
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}
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#endif /* _NITROX_CSR_H_ */
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