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numam-dpdk/lib/librte_pipeline
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Cristian Dumitrescu 64cfcebd68 pipeline: add register array to SWX 
Register arrays are stateful objects that can be read & modified by
both the data plane and the control plane, as opposed to tables, which
are read-only for data plane. One key use-case is the implementation
of stats counters.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2021-03-24 19:18:40 +01:00
..
meson.build
pipeline: add SWX pipeline specification file
2020-10-01 18:43:08 +02:00
rte_pipeline.c
replace snprintf with strlcpy without adding extra include
2019-04-04 22:45:54 +02:00
rte_pipeline.h
lib: use SPDX tag for Intel copyright files
2018-01-04 22:41:39 +01:00
rte_port_in_action.c
pipeline: add port in action APIs
2018-04-04 12:26:07 +02:00
rte_port_in_action.h
enforce experimental tag at beginning of declarations
2019-06-29 19:04:48 +02:00
rte_swx_ctl.c
table: add table entry priority
2021-03-23 18:49:41 +01:00
rte_swx_ctl.h
pipeline: add register array to SWX
2021-03-24 19:18:40 +01:00
rte_swx_extern.h
pipeline: add SWX extern objects and funcs
2020-10-01 18:43:07 +02:00
rte_swx_pipeline_spec.c
pipeline: add register array to SWX
2021-03-24 19:18:40 +01:00
rte_swx_pipeline.c
pipeline: add register array to SWX
2021-03-24 19:18:40 +01:00
rte_swx_pipeline.h
pipeline: add register array to SWX
2021-03-24 19:18:40 +01:00
rte_table_action.c
replace packed attributes
2020-04-16 18:16:46 +02:00
rte_table_action.h
examples/ip_pipeline: add config flexibility to TM
2019-07-22 15:42:59 +02:00
version.map
pipeline: add register array to SWX
2021-03-24 19:18:40 +01:00