295968d174
Add 'RTE_ETH' namespace to all enums & macros in a backward compatible way. The macros for backward compatibility can be removed in next LTS. Also updated some struct names to have 'rte_eth' prefix. All internal components switched to using new names. Syntax fixed on lines that this patch touches. Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Wisam Jaddo <wisamm@nvidia.com> Acked-by: Rosen Xu <rosen.xu@intel.com> Acked-by: Chenbo Xia <chenbo.xia@intel.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com> Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
178 lines
4.6 KiB
C
178 lines
4.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2020-2021 Broadcom
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* All rights reserved.
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*/
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#ifndef _BNXT_RXTX_VEC_COMMON_H_
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#define _BNXT_RXTX_VEC_COMMON_H_
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#include "hsi_struct_def_dpdk.h"
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#include "bnxt_rxq.h"
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#include "bnxt_rxr.h"
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#define TX_BD_FLAGS_CMPL ((1 << TX_BD_LONG_FLAGS_BD_CNT_SFT) | \
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TX_BD_SHORT_FLAGS_COAL_NOW | \
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TX_BD_SHORT_TYPE_TX_BD_SHORT | \
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TX_BD_LONG_FLAGS_PACKET_END)
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#define TX_BD_FLAGS_NOCMPL (TX_BD_FLAGS_CMPL | TX_BD_LONG_FLAGS_NO_CMPL)
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static inline uint32_t
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bnxt_xmit_flags_len(uint16_t len, uint16_t flags)
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{
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switch (len >> 9) {
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case 0:
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return flags | TX_BD_LONG_FLAGS_LHINT_LT512;
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case 1:
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return flags | TX_BD_LONG_FLAGS_LHINT_LT1K;
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case 2:
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return flags | TX_BD_LONG_FLAGS_LHINT_LT2K;
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case 3:
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return flags | TX_BD_LONG_FLAGS_LHINT_LT2K;
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default:
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return flags | TX_BD_LONG_FLAGS_LHINT_GTE2K;
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}
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}
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static inline int
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bnxt_rxq_vec_setup_common(struct bnxt_rx_queue *rxq)
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{
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uintptr_t p;
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struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
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mb_def.nb_segs = 1;
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mb_def.data_off = RTE_PKTMBUF_HEADROOM;
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mb_def.port = rxq->port_id;
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rte_mbuf_refcnt_set(&mb_def, 1);
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/* prevent compiler reordering: rearm_data covers previous fields */
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rte_compiler_barrier();
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p = (uintptr_t)&mb_def.rearm_data;
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rxq->mbuf_initializer = *(uint64_t *)p;
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rxq->rxrearm_nb = 0;
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rxq->rxrearm_start = 0;
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return 0;
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}
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static inline void
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bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)
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{
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struct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];
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struct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];
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int nb, i;
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/*
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* Number of mbufs to allocate must be a multiple of four. The
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* allocation must not go past the end of the ring.
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*/
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nb = RTE_MIN(rxq->rxrearm_nb & ~0x3,
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rxq->nb_rx_desc - rxq->rxrearm_start);
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/* Allocate new mbufs into the software ring. */
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if (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {
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rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;
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for (i = 0; i < nb; i++)
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rx_bufs[i] = &rxq->fake_mbuf;
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return;
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}
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/* Initialize the mbufs in vector, process 4 mbufs per loop. */
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for (i = 0; i < nb; i += 4) {
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rxbds[0].address = rte_mbuf_data_iova_default(rx_bufs[0]);
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rxbds[1].address = rte_mbuf_data_iova_default(rx_bufs[1]);
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rxbds[2].address = rte_mbuf_data_iova_default(rx_bufs[2]);
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rxbds[3].address = rte_mbuf_data_iova_default(rx_bufs[3]);
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rxbds += 4;
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rx_bufs += 4;
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}
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rxq->rxrearm_start += nb;
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bnxt_db_write(&rxr->rx_db, rxq->rxrearm_start - 1);
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if (rxq->rxrearm_start >= rxq->nb_rx_desc)
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rxq->rxrearm_start = 0;
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rxq->rxrearm_nb -= nb;
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}
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/*
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* Transmit completion function for use when RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE
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* is enabled.
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*/
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static inline void
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bnxt_tx_cmp_vec_fast(struct bnxt_tx_queue *txq, uint32_t nr_pkts)
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{
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struct bnxt_tx_ring_info *txr = txq->tx_ring;
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uint16_t cons, raw_cons = txr->tx_raw_cons;
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uint32_t ring_mask, ring_size, num;
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struct rte_mempool *pool;
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ring_mask = txr->tx_ring_struct->ring_mask;
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ring_size = txr->tx_ring_struct->ring_size;
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cons = raw_cons & ring_mask;
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num = RTE_MIN(nr_pkts, ring_size - cons);
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pool = txr->tx_buf_ring[cons]->pool;
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rte_mempool_put_bulk(pool, (void **)&txr->tx_buf_ring[cons], num);
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memset(&txr->tx_buf_ring[cons], 0, num * sizeof(struct rte_mbuf *));
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raw_cons += num;
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num = nr_pkts - num;
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if (num) {
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cons = raw_cons & ring_mask;
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rte_mempool_put_bulk(pool, (void **)&txr->tx_buf_ring[cons],
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num);
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memset(&txr->tx_buf_ring[cons], 0,
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num * sizeof(struct rte_mbuf *));
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raw_cons += num;
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}
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txr->tx_raw_cons = raw_cons;
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}
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static inline void
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bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, uint32_t nr_pkts)
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{
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struct bnxt_tx_ring_info *txr = txq->tx_ring;
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uint16_t cons, raw_cons = txr->tx_raw_cons;
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uint32_t ring_mask, ring_size, num, blk;
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struct rte_mempool *pool;
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ring_mask = txr->tx_ring_struct->ring_mask;
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ring_size = txr->tx_ring_struct->ring_size;
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while (nr_pkts) {
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struct rte_mbuf *mbuf;
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cons = raw_cons & ring_mask;
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num = RTE_MIN(nr_pkts, ring_size - cons);
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pool = txr->tx_buf_ring[cons]->pool;
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blk = 0;
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do {
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mbuf = txr->tx_buf_ring[cons + blk];
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mbuf = rte_pktmbuf_prefree_seg(mbuf);
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if (!mbuf || mbuf->pool != pool)
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break;
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blk++;
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} while (blk < num);
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if (blk) {
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rte_mempool_put_bulk(pool,
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(void **)&txr->tx_buf_ring[cons],
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blk);
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memset(&txr->tx_buf_ring[cons], 0,
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blk * sizeof(struct rte_mbuf *));
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raw_cons += blk;
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nr_pkts -= blk;
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}
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if (!mbuf) {
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/* Skip freeing mbufs with non-zero reference count. */
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raw_cons++;
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nr_pkts--;
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}
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}
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txr->tx_raw_cons = raw_cons;
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}
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#endif /* _BNXT_RXTX_VEC_COMMON_H_ */
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