1a7da795f6
Add support to create and submit CPT instructions on Tx on CN9K SoC. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
90 lines
2.9 KiB
C
90 lines
2.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#include "cn9k_ethdev.h"
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#include "cn9k_tx.h"
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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uint16_t __rte_noinline __rte_hot cn9k_nix_xmit_pkts_##name( \
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void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts) \
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{ \
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uint64_t cmd[sz]; \
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\
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/* For TSO inner checksum is a must */ \
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if (((flags) & NIX_TX_OFFLOAD_TSO_F) && \
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!((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F)) \
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return 0; \
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return cn9k_nix_xmit_pkts(tx_queue, tx_pkts, pkts, cmd, flags);\
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}
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NIX_TX_FASTPATH_MODES
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#undef T
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static inline void
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pick_tx_func(struct rte_eth_dev *eth_dev,
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const eth_tx_burst_t tx_burst[2][2][2][2][2][2][2])
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{
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struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
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/* [TS] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */
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eth_dev->tx_pkt_burst = tx_burst
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_SECURITY_F)]
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F)]
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F)]
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
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[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
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}
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void
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cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev)
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{
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struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
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const eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2][2] = {
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_##name,
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NIX_TX_FASTPATH_MODES
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#undef T
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};
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const eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2][2] = {
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_mseg_##name,
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NIX_TX_FASTPATH_MODES
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#undef T
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};
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const eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2][2] = {
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_##name,
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NIX_TX_FASTPATH_MODES
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#undef T
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};
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const eth_tx_burst_t nix_eth_tx_vec_burst_mseg[2][2][2][2][2][2][2] = {
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_mseg_##name,
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NIX_TX_FASTPATH_MODES
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#undef T
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};
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if (dev->scalar_ena) {
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pick_tx_func(eth_dev, nix_eth_tx_burst);
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if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
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pick_tx_func(eth_dev, nix_eth_tx_burst_mseg);
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} else {
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pick_tx_func(eth_dev, nix_eth_tx_vec_burst);
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if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
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pick_tx_func(eth_dev, nix_eth_tx_vec_burst_mseg);
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}
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rte_mb();
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}
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