6c6976e587
Add and modify the nfp PMD struct and macro that will be used by firmware with NFDk. Signed-off-by: Jin Liu <jin.liu@corigine.com> Signed-off-by: Diana Wang <na.wang@corigine.com> Signed-off-by: Peng Zhang <peng.zhang@corigine.com> Signed-off-by: Chaoyong He <chaoyong.he@corigine.com> Signed-off-by: Niklas Söderlund <niklas.soderlund@corigine.com>
358 lines
10 KiB
C
358 lines
10 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2014-2021 Netronome Systems, Inc.
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* All rights reserved.
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*/
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/*
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* vim:shiftwidth=8:noexpandtab
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*
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* @file dpdk/pmd/nfp_rxtx.h
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*
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* Netronome NFP Rx/Tx specific header file
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*/
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#ifndef _NFP_RXTX_H_
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#define _NFP_RXTX_H_
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#include <linux/types.h>
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#include <rte_io.h>
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#define NFP_DESC_META_LEN(d) ((d)->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK)
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#define NFP_HASH_OFFSET ((uint8_t *)mbuf->buf_addr + mbuf->data_off - 4)
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#define NFP_HASH_TYPE_OFFSET ((uint8_t *)mbuf->buf_addr + mbuf->data_off - 8)
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#define RTE_MBUF_DMA_ADDR_DEFAULT(mb) \
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((uint64_t)((mb)->buf_iova + RTE_PKTMBUF_HEADROOM))
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/*
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* The maximum number of descriptors is limited by design as
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* DPDK uses uint16_t variables for these values
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*/
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#define NFP_NET_MAX_TX_DESC (32 * 1024)
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#define NFP_NET_MIN_TX_DESC 256
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#define NFP_NET_MAX_RX_DESC (32 * 1024)
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#define NFP_NET_MIN_RX_DESC 256
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/* Descriptor alignment */
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#define NFP_ALIGN_RING_DESC 128
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/* TX descriptor format */
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#define PCIE_DESC_TX_EOP (1 << 7)
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#define PCIE_DESC_TX_OFFSET_MASK (0x7f)
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/* Flags in the host TX descriptor */
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#define PCIE_DESC_TX_CSUM (1 << 7)
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#define PCIE_DESC_TX_IP4_CSUM (1 << 6)
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#define PCIE_DESC_TX_TCP_CSUM (1 << 5)
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#define PCIE_DESC_TX_UDP_CSUM (1 << 4)
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#define PCIE_DESC_TX_VLAN (1 << 3)
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#define PCIE_DESC_TX_LSO (1 << 2)
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#define PCIE_DESC_TX_ENCAP_NONE (0)
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#define PCIE_DESC_TX_ENCAP_VXLAN (1 << 1)
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#define PCIE_DESC_TX_ENCAP_GRE (1 << 0)
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#define NFDK_TX_MAX_DATA_PER_HEAD 0x00001000
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#define NFDK_DESC_TX_DMA_LEN_HEAD 0x0fff
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#define NFDK_DESC_TX_TYPE_HEAD 0xf000
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#define NFDK_DESC_TX_DMA_LEN 0x3fff
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#define NFDK_TX_DESC_PER_SIMPLE_PKT 2
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#define NFDK_DESC_TX_TYPE_TSO 2
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#define NFDK_DESC_TX_TYPE_SIMPLE 8
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#define NFDK_DESC_TX_TYPE_GATHER 1
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#define NFDK_DESC_TX_EOP BIT(14)
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#define NFDK_DESC_TX_L4_CSUM BIT(1)
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#define NFDK_DESC_TX_L3_CSUM BIT(0)
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#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000
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#define NFDK_TX_DESC_GATHER_MAX 17
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#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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#define NFDK_TX_DESC_BLOCK_SZ 256
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#define NFDK_TX_DESC_BLOCK_CNT (NFDK_TX_DESC_BLOCK_SZ / \
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sizeof(struct nfp_net_nfdk_tx_desc))
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#define NFDK_TX_DESC_STOP_CNT (NFDK_TX_DESC_BLOCK_CNT * \
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NFDK_TX_DESC_PER_SIMPLE_PKT)
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#define NFDK_TX_MAX_DATA_PER_BLOCK 0x00010000
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#define D_BLOCK_CPL(idx) (NFDK_TX_DESC_BLOCK_CNT - \
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(idx) % NFDK_TX_DESC_BLOCK_CNT)
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#define D_IDX(ring, idx) ((idx) & ((ring)->tx_count - 1))
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struct nfp_net_nfd3_tx_desc {
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union {
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struct {
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uint8_t dma_addr_hi; /* High bits of host buf address */
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__le16 dma_len; /* Length to DMA for this desc */
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uint8_t offset_eop; /* Offset in buf where pkt starts +
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* highest bit is eop flag.
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*/
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__le32 dma_addr_lo; /* Low 32bit of host buf addr */
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__le16 mss; /* MSS to be used for LSO */
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uint8_t lso_hdrlen; /* LSO, where the data starts */
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uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */
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union {
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struct {
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/*
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* L3 and L4 header offsets required
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* for TSOv2
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*/
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uint8_t l3_offset;
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uint8_t l4_offset;
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};
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__le16 vlan; /* VLAN tag to add if indicated */
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};
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__le16 data_len; /* Length of frame + meta data */
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} __rte_packed;
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__le32 vals[4];
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};
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};
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struct nfp_net_nfdk_tx_desc {
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union {
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struct {
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__le16 dma_addr_hi; /* High bits of host buf address */
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__le16 dma_len_type; /* Length to DMA for this desc */
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__le32 dma_addr_lo; /* Low 32bit of host buf addr */
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};
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struct {
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__le16 mss; /* MSS to be used for LSO */
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uint8_t lso_hdrlen; /* LSO, TCP payload offset */
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uint8_t lso_totsegs; /* LSO, total segments */
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uint8_t l3_offset; /* L3 header offset */
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uint8_t l4_offset; /* L4 header offset */
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__le16 lso_meta_res; /* Rsvd bits in TSO metadata */
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};
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struct {
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uint8_t flags; /* TX Flags, see @NFDK_DESC_TX_* */
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uint8_t reserved[7]; /* meta byte placeholder */
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};
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__le32 vals[2];
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__le64 raw;
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};
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};
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struct nfp_net_txq {
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struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
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/*
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* Queue information: @qidx is the queue index from Linux's
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* perspective. @tx_qcidx is the index of the Queue
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* Controller Peripheral queue relative to the TX queue BAR.
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* @cnt is the size of the queue in number of
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* descriptors. @qcp_q is a pointer to the base of the queue
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* structure on the NFP
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*/
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uint8_t *qcp_q;
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/*
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* Read and Write pointers. @wr_p and @rd_p are host side pointer,
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* they are free running and have little relation to the QCP pointers *
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* @qcp_rd_p is a local copy queue controller peripheral read pointer
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*/
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uint32_t wr_p;
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uint32_t rd_p;
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uint32_t tx_count;
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uint32_t tx_free_thresh;
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/*
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* For each descriptor keep a reference to the mbuf and
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* DMA address used until completion is signalled.
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*/
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struct {
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struct rte_mbuf *mbuf;
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} *txbufs;
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/*
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* Information about the host side queue location. @txds is
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* the virtual address for the queue, @dma is the DMA address
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* of the queue and @size is the size in bytes for the queue
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* (needed for free)
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*/
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union {
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struct nfp_net_nfd3_tx_desc *txds;
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struct nfp_net_nfdk_tx_desc *ktxds;
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};
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/*
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* At this point 48 bytes have been used for all the fields in the
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* TX critical path. We have room for 8 bytes and still all placed
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* in a cache line. We are not using the threshold values below but
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* if we need to, we can add the most used in the remaining bytes.
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*/
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uint32_t tx_rs_thresh; /* not used by now. Future? */
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uint32_t tx_pthresh; /* not used by now. Future? */
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uint32_t tx_hthresh; /* not used by now. Future? */
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uint32_t tx_wthresh; /* not used by now. Future? */
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uint16_t port_id;
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uint16_t data_pending; /* used by nfdk only */
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int qidx;
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int tx_qcidx;
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__le64 dma;
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} __rte_aligned(64);
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/* RX and freelist descriptor format */
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#define PCIE_DESC_RX_DD (1 << 7)
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#define PCIE_DESC_RX_META_LEN_MASK (0x7f)
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/* Flags in the RX descriptor */
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#define PCIE_DESC_RX_RSS (1 << 15)
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#define PCIE_DESC_RX_I_IP4_CSUM (1 << 14)
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#define PCIE_DESC_RX_I_IP4_CSUM_OK (1 << 13)
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#define PCIE_DESC_RX_I_TCP_CSUM (1 << 12)
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#define PCIE_DESC_RX_I_TCP_CSUM_OK (1 << 11)
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#define PCIE_DESC_RX_I_UDP_CSUM (1 << 10)
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#define PCIE_DESC_RX_I_UDP_CSUM_OK (1 << 9)
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#define PCIE_DESC_RX_SPARE (1 << 8)
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#define PCIE_DESC_RX_EOP (1 << 7)
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#define PCIE_DESC_RX_IP4_CSUM (1 << 6)
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#define PCIE_DESC_RX_IP4_CSUM_OK (1 << 5)
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#define PCIE_DESC_RX_TCP_CSUM (1 << 4)
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#define PCIE_DESC_RX_TCP_CSUM_OK (1 << 3)
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#define PCIE_DESC_RX_UDP_CSUM (1 << 2)
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#define PCIE_DESC_RX_UDP_CSUM_OK (1 << 1)
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#define PCIE_DESC_RX_VLAN (1 << 0)
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#define PCIE_DESC_RX_L4_CSUM_OK (PCIE_DESC_RX_TCP_CSUM_OK | \
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PCIE_DESC_RX_UDP_CSUM_OK)
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struct nfp_net_rx_desc {
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union {
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/* Freelist descriptor */
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struct {
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uint8_t dma_addr_hi;
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__le16 spare;
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uint8_t dd;
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__le32 dma_addr_lo;
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} __rte_packed fld;
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/* RX descriptor */
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struct {
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__le16 data_len;
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uint8_t reserved;
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uint8_t meta_len_dd;
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__le16 flags;
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__le16 vlan;
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} __rte_packed rxd;
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__le32 vals[2];
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};
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};
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struct nfp_net_rx_buff {
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struct rte_mbuf *mbuf;
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};
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struct nfp_net_rxq {
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struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
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/*
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* @qcp_fl and @qcp_rx are pointers to the base addresses of the
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* freelist and RX queue controller peripheral queue structures on the
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* NFP
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*/
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uint8_t *qcp_fl;
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uint8_t *qcp_rx;
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/*
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* Read and Write pointers. @wr_p and @rd_p are host side
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* pointer, they are free running and have little relation to
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* the QCP pointers. @wr_p is where the driver adds new
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* freelist descriptors and @rd_p is where the driver start
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* reading descriptors for newly arrive packets from.
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*/
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uint32_t rd_p;
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/*
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* For each buffer placed on the freelist, record the
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* associated SKB
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*/
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struct nfp_net_rx_buff *rxbufs;
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/*
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* Information about the host side queue location. @rxds is
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* the virtual address for the queue
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*/
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struct nfp_net_rx_desc *rxds;
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/*
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* The mempool is created by the user specifying a mbuf size.
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* We save here the reference of the mempool needed in the RX
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* path and the mbuf size for checking received packets can be
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* safely copied to the mbuf using the NFP_NET_RX_OFFSET
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*/
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struct rte_mempool *mem_pool;
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uint16_t mbuf_size;
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/*
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* Next two fields are used for giving more free descriptors
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* to the NFP
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*/
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uint16_t rx_free_thresh;
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uint16_t nb_rx_hold;
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/* the size of the queue in number of descriptors */
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uint16_t rx_count;
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/*
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* Fields above this point fit in a single cache line and are all used
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* in the RX critical path. Fields below this point are just used
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* during queue configuration or not used at all (yet)
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*/
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/* referencing dev->data->port_id */
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uint16_t port_id;
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uint8_t crc_len; /* Not used by now */
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uint8_t drop_en; /* Not used by now */
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/* DMA address of the queue */
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__le64 dma;
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/*
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* Queue information: @qidx is the queue index from Linux's
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* perspective. @fl_qcidx is the index of the Queue
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* Controller peripheral queue relative to the RX queue BAR
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* used for the freelist and @rx_qcidx is the Queue Controller
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* Peripheral index for the RX queue.
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*/
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int qidx;
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int fl_qcidx;
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int rx_qcidx;
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} __rte_aligned(64);
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int nfp_net_rx_freelist_setup(struct rte_eth_dev *dev);
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uint32_t nfp_net_rx_queue_count(void *rx_queue);
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uint16_t nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
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uint16_t nb_pkts);
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void nfp_net_rx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx);
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void nfp_net_reset_rx_queue(struct nfp_net_rxq *rxq);
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int nfp_net_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
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uint16_t nb_desc, unsigned int socket_id,
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const struct rte_eth_rxconf *rx_conf,
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struct rte_mempool *mp);
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void nfp_net_tx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx);
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void nfp_net_reset_tx_queue(struct nfp_net_txq *txq);
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int nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
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uint16_t nb_desc, unsigned int socket_id,
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const struct rte_eth_txconf *tx_conf);
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uint16_t nfp_net_nfd3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
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uint16_t nb_pkts);
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#endif /* _NFP_RXTX_H_ */
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/*
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* Local variables:
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* c-file-style: "Linux"
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* indent-tabs-mode: t
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* End:
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*/
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