6d13ea8e8e
Add 'rte_' prefix to structures: - rename struct ether_addr as struct rte_ether_addr. - rename struct ether_hdr as struct rte_ether_hdr. - rename struct vlan_hdr as struct rte_vlan_hdr. - rename struct vxlan_hdr as struct rte_vxlan_hdr. - rename struct vxlan_gpe_hdr as struct rte_vxlan_gpe_hdr. Do not update the command line library to avoid adding a dependency to librte_net. Signed-off-by: Olivier Matz <olivier.matz@6wind.com> Reviewed-by: Stephen Hemminger <stephen@networkplumber.org> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
369 lines
12 KiB
C
369 lines
12 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#ifndef _ICE_ETHDEV_H_
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#define _ICE_ETHDEV_H_
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#include <rte_kvargs.h>
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#include <rte_ethdev_driver.h>
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#include "base/ice_common.h"
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#include "base/ice_adminq_cmd.h"
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#define ICE_VLAN_TAG_SIZE 4
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#define ICE_ADMINQ_LEN 32
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#define ICE_SBIOQ_LEN 32
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#define ICE_MAILBOXQ_LEN 32
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#define ICE_ADMINQ_BUF_SZ 4096
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#define ICE_SBIOQ_BUF_SZ 4096
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#define ICE_MAILBOXQ_BUF_SZ 4096
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/* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
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#define ICE_MAX_Q_PER_TC 64
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#define ICE_NUM_DESC_DEFAULT 512
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#define ICE_BUF_SIZE_MIN 1024
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#define ICE_FRAME_SIZE_MAX 9728
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#define ICE_QUEUE_BASE_ADDR_UNIT 128
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/* number of VSIs and queue default setting */
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#define ICE_MAX_QP_NUM_PER_VF 16
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#define ICE_DEFAULT_QP_NUM_FDIR 1
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#define ICE_UINT32_BIT_SIZE (CHAR_BIT * sizeof(uint32_t))
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#define ICE_VFTA_SIZE (4096 / ICE_UINT32_BIT_SIZE)
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/* Maximun number of MAC addresses */
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#define ICE_NUM_MACADDR_MAX 64
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/* Maximum number of VFs */
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#define ICE_MAX_VF 128
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#define ICE_MAX_INTR_QUEUE_NUM 256
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#define ICE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
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#define ICE_RX_VEC_ID RTE_INTR_VEC_RXTX_OFFSET
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#define ICE_MAX_PKT_TYPE 1024
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/**
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* vlan_id is a 12 bit number.
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* The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
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* 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
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* The higher 7 bit val specifies VFTA array index.
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*/
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#define ICE_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F))
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#define ICE_VFTA_IDX(vlan_id) ((vlan_id) >> 5)
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/* Default TC traffic in case DCB is not enabled */
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#define ICE_DEFAULT_TCMAP 0x1
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#define ICE_FDIR_QUEUE_ID 0
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/* Always assign pool 0 to main VSI, VMDQ will start from 1 */
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#define ICE_VMDQ_POOL_BASE 1
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#define ICE_DEFAULT_RX_FREE_THRESH 32
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#define ICE_DEFAULT_RX_PTHRESH 8
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#define ICE_DEFAULT_RX_HTHRESH 8
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#define ICE_DEFAULT_RX_WTHRESH 0
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#define ICE_DEFAULT_TX_FREE_THRESH 32
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#define ICE_DEFAULT_TX_PTHRESH 32
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#define ICE_DEFAULT_TX_HTHRESH 0
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#define ICE_DEFAULT_TX_WTHRESH 0
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#define ICE_DEFAULT_TX_RSBIT_THRESH 32
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/* Bit shift and mask */
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#define ICE_4_BIT_WIDTH (CHAR_BIT / 2)
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#define ICE_4_BIT_MASK RTE_LEN2MASK(ICE_4_BIT_WIDTH, uint8_t)
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#define ICE_8_BIT_WIDTH CHAR_BIT
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#define ICE_8_BIT_MASK UINT8_MAX
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#define ICE_16_BIT_WIDTH (CHAR_BIT * 2)
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#define ICE_16_BIT_MASK UINT16_MAX
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#define ICE_32_BIT_WIDTH (CHAR_BIT * 4)
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#define ICE_32_BIT_MASK UINT32_MAX
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#define ICE_40_BIT_WIDTH (CHAR_BIT * 5)
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#define ICE_40_BIT_MASK RTE_LEN2MASK(ICE_40_BIT_WIDTH, uint64_t)
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#define ICE_48_BIT_WIDTH (CHAR_BIT * 6)
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#define ICE_48_BIT_MASK RTE_LEN2MASK(ICE_48_BIT_WIDTH, uint64_t)
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#define ICE_FLAG_RSS BIT_ULL(0)
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#define ICE_FLAG_DCB BIT_ULL(1)
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#define ICE_FLAG_VMDQ BIT_ULL(2)
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#define ICE_FLAG_SRIOV BIT_ULL(3)
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#define ICE_FLAG_HEADER_SPLIT_DISABLED BIT_ULL(4)
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#define ICE_FLAG_HEADER_SPLIT_ENABLED BIT_ULL(5)
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#define ICE_FLAG_FDIR BIT_ULL(6)
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#define ICE_FLAG_VXLAN BIT_ULL(7)
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#define ICE_FLAG_RSS_AQ_CAPABLE BIT_ULL(8)
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#define ICE_FLAG_VF_MAC_BY_PF BIT_ULL(9)
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#define ICE_FLAG_ALL (ICE_FLAG_RSS | \
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ICE_FLAG_DCB | \
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ICE_FLAG_VMDQ | \
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ICE_FLAG_SRIOV | \
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ICE_FLAG_HEADER_SPLIT_DISABLED | \
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ICE_FLAG_HEADER_SPLIT_ENABLED | \
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ICE_FLAG_FDIR | \
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ICE_FLAG_VXLAN | \
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ICE_FLAG_RSS_AQ_CAPABLE | \
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ICE_FLAG_VF_MAC_BY_PF)
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#define ICE_RSS_OFFLOAD_ALL ( \
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ETH_RSS_FRAG_IPV4 | \
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ETH_RSS_NONFRAG_IPV4_TCP | \
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ETH_RSS_NONFRAG_IPV4_UDP | \
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ETH_RSS_NONFRAG_IPV4_SCTP | \
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ETH_RSS_NONFRAG_IPV4_OTHER | \
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ETH_RSS_FRAG_IPV6 | \
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ETH_RSS_NONFRAG_IPV6_TCP | \
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ETH_RSS_NONFRAG_IPV6_UDP | \
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ETH_RSS_NONFRAG_IPV6_SCTP | \
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ETH_RSS_NONFRAG_IPV6_OTHER | \
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ETH_RSS_L2_PAYLOAD)
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/**
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* The overhead from MTU to max frame size.
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* Considering QinQ packet, the VLAN tag needs to be counted twice.
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*/
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#define ICE_ETH_OVERHEAD \
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(ETHER_HDR_LEN + ETHER_CRC_LEN + ICE_VLAN_TAG_SIZE * 2)
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struct ice_adapter;
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/**
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* MAC filter structure
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*/
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struct ice_mac_filter_info {
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struct rte_ether_addr mac_addr;
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};
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TAILQ_HEAD(ice_mac_filter_list, ice_mac_filter);
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/* MAC filter list structure */
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struct ice_mac_filter {
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TAILQ_ENTRY(ice_mac_filter) next;
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struct ice_mac_filter_info mac_info;
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};
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/**
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* VLAN filter structure
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*/
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struct ice_vlan_filter_info {
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uint16_t vlan_id;
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};
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TAILQ_HEAD(ice_vlan_filter_list, ice_vlan_filter);
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/* VLAN filter list structure */
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struct ice_vlan_filter {
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TAILQ_ENTRY(ice_vlan_filter) next;
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struct ice_vlan_filter_info vlan_info;
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};
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struct pool_entry {
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LIST_ENTRY(pool_entry) next;
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uint16_t base;
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uint16_t len;
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};
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LIST_HEAD(res_list, pool_entry);
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struct ice_res_pool_info {
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uint32_t base; /* Resource start index */
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uint32_t num_alloc; /* Allocated resource number */
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uint32_t num_free; /* Total available resource number */
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struct res_list alloc_list; /* Allocated resource list */
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struct res_list free_list; /* Available resource list */
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};
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TAILQ_HEAD(ice_vsi_list_head, ice_vsi_list);
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struct ice_vsi;
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/* VSI list structure */
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struct ice_vsi_list {
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TAILQ_ENTRY(ice_vsi_list) list;
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struct ice_vsi *vsi;
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};
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struct ice_rx_queue;
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struct ice_tx_queue;
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/**
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* Structure that defines a VSI, associated with a adapter.
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*/
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struct ice_vsi {
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struct ice_adapter *adapter; /* Backreference to associated adapter */
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struct ice_aqc_vsi_props info; /* VSI properties */
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/**
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* When drivers loaded, only a default main VSI exists. In case new VSI
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* needs to add, HW needs to know the layout that VSIs are organized.
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* Besides that, VSI isan element and can't switch packets, which needs
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* to add new component VEB to perform switching. So, a new VSI needs
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* to specify the the uplink VSI (Parent VSI) before created. The
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* uplink VSI will check whether it had a VEB to switch packets. If no,
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* it will try to create one. Then, uplink VSI will move the new VSI
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* into its' sib_vsi_list to manage all the downlink VSI.
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* sib_vsi_list: the VSI list that shared the same uplink VSI.
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* parent_vsi : the uplink VSI. It's NULL for main VSI.
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* veb : the VEB associates with the VSI.
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*/
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struct ice_vsi_list sib_vsi_list; /* sibling vsi list */
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struct ice_vsi *parent_vsi;
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enum ice_vsi_type type; /* VSI types */
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uint16_t vlan_num; /* Total VLAN number */
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uint16_t mac_num; /* Total mac number */
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struct ice_mac_filter_list mac_list; /* macvlan filter list */
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struct ice_vlan_filter_list vlan_list; /* vlan filter list */
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uint16_t nb_qps; /* Number of queue pairs VSI can occupy */
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uint16_t nb_used_qps; /* Number of queue pairs VSI uses */
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uint16_t max_macaddrs; /* Maximum number of MAC addresses */
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uint16_t base_queue; /* The first queue index of this VSI */
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uint16_t vsi_id; /* Hardware Id */
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uint16_t idx; /* vsi_handle: SW index in hw->vsi_ctx */
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/* VF number to which the VSI connects, valid when VSI is VF type */
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uint8_t vf_num;
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uint16_t msix_intr; /* The MSIX interrupt binds to VSI */
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uint16_t nb_msix; /* The max number of msix vector */
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uint8_t enabled_tc; /* The traffic class enabled */
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uint8_t vlan_anti_spoof_on; /* The VLAN anti-spoofing enabled */
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uint8_t vlan_filter_on; /* The VLAN filter enabled */
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/* information about rss configuration */
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u32 rss_key_size;
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u32 rss_lut_size;
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uint8_t *rss_lut;
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uint8_t *rss_key;
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struct ice_eth_stats eth_stats_offset;
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struct ice_eth_stats eth_stats;
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bool offset_loaded;
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};
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struct ice_pf {
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struct ice_adapter *adapter; /* The adapter this PF associate to */
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struct ice_vsi *main_vsi; /* pointer to main VSI structure */
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/* Used for next free software vsi idx.
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* To save the effort, we don't recycle the index.
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* Suppose the indexes are more than enough.
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*/
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uint16_t next_vsi_idx;
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uint16_t vsis_allocated;
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uint16_t vsis_unallocated;
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struct ice_res_pool_info qp_pool; /*Queue pair pool */
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struct ice_res_pool_info msix_pool; /* MSIX interrupt pool */
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struct rte_eth_dev_data *dev_data; /* Pointer to the device data */
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struct rte_ether_addr dev_addr; /* PF device mac address */
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uint64_t flags; /* PF feature flags */
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uint16_t hash_lut_size; /* The size of hash lookup table */
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uint16_t lan_nb_qp_max;
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uint16_t lan_nb_qps; /* The number of queue pairs of LAN */
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struct ice_hw_port_stats stats_offset;
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struct ice_hw_port_stats stats;
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/* internal packet statistics, it should be excluded from the total */
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struct ice_eth_stats internal_stats_offset;
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struct ice_eth_stats internal_stats;
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bool offset_loaded;
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bool adapter_stopped;
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};
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/**
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* Structure to store private data for each PF/VF instance.
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*/
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struct ice_adapter {
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/* Common for both PF and VF */
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struct ice_hw hw;
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struct rte_eth_dev *eth_dev;
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struct ice_pf pf;
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bool rx_bulk_alloc_allowed;
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bool tx_simple_allowed;
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/* ptype mapping table */
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uint32_t ptype_tbl[ICE_MAX_PKT_TYPE] __rte_cache_min_aligned;
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bool is_safe_mode;
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};
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struct ice_vsi_vlan_pvid_info {
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uint16_t on; /* Enable or disable pvid */
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union {
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uint16_t pvid; /* Valid in case 'on' is set to set pvid */
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struct {
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/* Valid in case 'on' is cleared. 'tagged' will reject
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* tagged packets, while 'untagged' will reject
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* untagged packets.
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*/
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uint8_t tagged;
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uint8_t untagged;
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} reject;
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} config;
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};
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#define ICE_DEV_TO_PCI(eth_dev) \
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RTE_DEV_TO_PCI((eth_dev)->device)
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/* ICE_DEV_PRIVATE_TO */
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#define ICE_DEV_PRIVATE_TO_PF(adapter) \
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(&((struct ice_adapter *)adapter)->pf)
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#define ICE_DEV_PRIVATE_TO_HW(adapter) \
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(&((struct ice_adapter *)adapter)->hw)
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#define ICE_DEV_PRIVATE_TO_ADAPTER(adapter) \
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((struct ice_adapter *)adapter)
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/* ICE_VSI_TO */
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#define ICE_VSI_TO_HW(vsi) \
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(&(((struct ice_vsi *)vsi)->adapter->hw))
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#define ICE_VSI_TO_PF(vsi) \
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(&(((struct ice_vsi *)vsi)->adapter->pf))
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#define ICE_VSI_TO_ETH_DEV(vsi) \
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(((struct ice_vsi *)vsi)->adapter->eth_dev)
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/* ICE_PF_TO */
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#define ICE_PF_TO_HW(pf) \
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(&(((struct ice_pf *)pf)->adapter->hw))
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#define ICE_PF_TO_ADAPTER(pf) \
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((struct ice_adapter *)(pf)->adapter)
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#define ICE_PF_TO_ETH_DEV(pf) \
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(((struct ice_pf *)pf)->adapter->eth_dev)
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static inline int
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ice_align_floor(int n)
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{
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if (n == 0)
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return 0;
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return 1 << (sizeof(n) * CHAR_BIT - 1 - __builtin_clz(n));
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}
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#define ICE_PHY_TYPE_SUPPORT_50G(phy_type) \
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(((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_CR2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_SR2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_LR2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_KR2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50G_LAUI2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50G_AUI2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_CP) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_SR) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_FR) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_LR) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_LOW_50G_AUI1))
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#define ICE_PHY_TYPE_SUPPORT_100G_LOW(phy_type) \
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(((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_CR4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_SR4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_LR4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_KR4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100G_CAUI4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100G_AUI4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_CP2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_SR2) || \
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((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_DR))
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#define ICE_PHY_TYPE_SUPPORT_100G_HIGH(phy_type) \
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(((phy_type) & ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4) || \
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((phy_type) & ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_HIGH_100G_CAUI2) || \
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((phy_type) & ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC) || \
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((phy_type) & ICE_PHY_TYPE_HIGH_100G_AUI2))
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#endif /* _ICE_ETHDEV_H_ */
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