d944410a44
If the nb_pkts parameter to rte_eth_tx_burst() was greater than
the TX descriptor count, a completion was not being requested
from the NIC, so descriptors would not be released back to the
host causing a lock-up.
Introduce a limit of how many TX descriptors can be used in a single
call to the enic PMD burst TX function before requesting a completion.
Fixes: d739ba4c6a
("enic: improve Tx packet rate")
Signed-off-by: John Daley <johndale@cisco.com>
688 lines
17 KiB
C
688 lines
17 KiB
C
/*
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* Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* Copyright (c) 2014, Cisco Systems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <rte_dev.h>
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#include <rte_pci.h>
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#include <rte_ethdev.h>
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#include <rte_string_fns.h>
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#include "vnic_intr.h"
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#include "vnic_cq.h"
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#include "vnic_wq.h"
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#include "vnic_rq.h"
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#include "vnic_enet.h"
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#include "enic.h"
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#ifdef RTE_LIBRTE_ENIC_DEBUG
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#define ENICPMD_FUNC_TRACE() \
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RTE_LOG(DEBUG, PMD, "ENICPMD trace: %s\n", __func__)
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#else
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#define ENICPMD_FUNC_TRACE() (void)0
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#endif
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/*
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* The set of PCI devices this driver supports
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*/
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static const struct rte_pci_id pci_id_enic_map[] = {
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#define RTE_PCI_DEV_ID_DECL_ENIC(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#ifndef PCI_VENDOR_ID_CISCO
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#define PCI_VENDOR_ID_CISCO 0x1137
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#endif
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#include "rte_pci_dev_ids.h"
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RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET)
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RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)
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{.vendor_id = 0, /* Sentinal */},
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};
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static int
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enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
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enum rte_filter_op filter_op, void *arg)
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{
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struct enic *enic = pmd_priv(eth_dev);
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int ret = 0;
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ENICPMD_FUNC_TRACE();
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if (filter_op == RTE_ETH_FILTER_NOP)
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return 0;
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if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
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return -EINVAL;
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switch (filter_op) {
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case RTE_ETH_FILTER_ADD:
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case RTE_ETH_FILTER_UPDATE:
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ret = enic_fdir_add_fltr(enic,
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(struct rte_eth_fdir_filter *)arg);
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break;
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case RTE_ETH_FILTER_DELETE:
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ret = enic_fdir_del_fltr(enic,
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(struct rte_eth_fdir_filter *)arg);
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break;
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case RTE_ETH_FILTER_STATS:
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enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
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break;
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case RTE_ETH_FILTER_FLUSH:
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case RTE_ETH_FILTER_INFO:
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dev_warning(enic, "unsupported operation %u", filter_op);
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ret = -ENOTSUP;
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break;
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default:
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dev_err(enic, "unknown operation %u", filter_op);
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int
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enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
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enum rte_filter_type filter_type,
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enum rte_filter_op filter_op,
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void *arg)
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{
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int ret = -EINVAL;
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if (RTE_ETH_FILTER_FDIR == filter_type)
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ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
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else
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dev_warning(enic, "Filter type (%d) not supported",
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filter_type);
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return ret;
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}
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static void enicpmd_dev_tx_queue_release(void *txq)
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{
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ENICPMD_FUNC_TRACE();
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enic_free_wq(txq);
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}
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static int enicpmd_dev_setup_intr(struct enic *enic)
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{
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int ret;
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unsigned int index;
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ENICPMD_FUNC_TRACE();
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/* Are we done with the init of all the queues? */
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for (index = 0; index < enic->cq_count; index++) {
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if (!enic->cq[index].ctrl)
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break;
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}
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if (enic->cq_count != index)
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return 0;
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ret = enic_alloc_intr_resources(enic);
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if (ret) {
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dev_err(enic, "alloc intr failed\n");
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return ret;
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}
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enic_init_vnic_resources(enic);
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ret = enic_setup_finish(enic);
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if (ret)
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dev_err(enic, "setup could not be finished\n");
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return ret;
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}
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static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
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uint16_t queue_idx,
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uint16_t nb_desc,
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unsigned int socket_id,
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__rte_unused const struct rte_eth_txconf *tx_conf)
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{
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int ret;
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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if (queue_idx >= ENIC_WQ_MAX) {
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dev_err(enic,
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"Max number of TX queues exceeded. Max is %d\n",
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ENIC_WQ_MAX);
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return -EINVAL;
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}
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eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx];
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ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
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if (ret) {
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dev_err(enic, "error in allocating wq\n");
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return ret;
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}
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return enicpmd_dev_setup_intr(enic);
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}
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static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
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uint16_t queue_idx)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic_start_wq(enic, queue_idx);
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eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
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return 0;
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}
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static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
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uint16_t queue_idx)
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{
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int ret;
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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ret = enic_stop_wq(enic, queue_idx);
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if (ret)
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dev_err(enic, "error in stopping wq %d\n", queue_idx);
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else
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eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
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return ret;
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}
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static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
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uint16_t queue_idx)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic_start_rq(enic, queue_idx);
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eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
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return 0;
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}
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static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
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uint16_t queue_idx)
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{
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int ret;
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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ret = enic_stop_rq(enic, queue_idx);
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if (ret)
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dev_err(enic, "error in stopping rq %d\n", queue_idx);
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else
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eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
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return ret;
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}
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static void enicpmd_dev_rx_queue_release(void *rxq)
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{
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ENICPMD_FUNC_TRACE();
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enic_free_rq(rxq);
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}
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static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
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uint16_t queue_idx,
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uint16_t nb_desc,
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unsigned int socket_id,
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const struct rte_eth_rxconf *rx_conf,
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struct rte_mempool *mp)
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{
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int ret;
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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if (queue_idx >= ENIC_RQ_MAX) {
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dev_err(enic,
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"Max number of RX queues exceeded. Max is %d\n",
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ENIC_RQ_MAX);
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return -EINVAL;
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}
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eth_dev->data->rx_queues[queue_idx] = (void *)&enic->rq[queue_idx];
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ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc);
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if (ret) {
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dev_err(enic, "error in allocating rq\n");
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return ret;
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}
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enic->rq[queue_idx].rx_free_thresh = rx_conf->rx_free_thresh;
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dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
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enic->rq[queue_idx].rx_free_thresh);
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return enicpmd_dev_setup_intr(enic);
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}
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static int enicpmd_vlan_filter_set(struct rte_eth_dev *eth_dev,
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uint16_t vlan_id, int on)
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{
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struct enic *enic = pmd_priv(eth_dev);
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int err;
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ENICPMD_FUNC_TRACE();
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if (on)
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err = enic_add_vlan(enic, vlan_id);
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else
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err = enic_del_vlan(enic, vlan_id);
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return err;
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}
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static void enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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if (mask & ETH_VLAN_STRIP_MASK) {
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if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
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enic->ig_vlan_strip_en = 1;
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else
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enic->ig_vlan_strip_en = 0;
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}
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enic_set_rss_nic_cfg(enic);
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if (mask & ETH_VLAN_FILTER_MASK) {
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dev_warning(enic,
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"Configuration of VLAN filter is not supported\n");
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}
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if (mask & ETH_VLAN_EXTEND_MASK) {
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dev_warning(enic,
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"Configuration of extended VLAN is not supported\n");
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}
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}
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static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
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{
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int ret;
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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ret = enic_set_vnic_res(enic);
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if (ret) {
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dev_err(enic, "Set vNIC resource num failed, aborting\n");
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return ret;
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}
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if (eth_dev->data->dev_conf.rxmode.split_hdr_size &&
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eth_dev->data->dev_conf.rxmode.header_split) {
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/* Enable header-data-split */
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enic_set_hdr_split_size(enic,
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eth_dev->data->dev_conf.rxmode.split_hdr_size);
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}
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enic->hw_ip_checksum = eth_dev->data->dev_conf.rxmode.hw_ip_checksum;
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return 0;
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}
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/* Start the device.
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* It returns 0 on success.
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*/
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static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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return enic_enable(enic);
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}
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/*
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* Stop device: disable rx and tx functions to allow for reconfiguring.
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*/
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static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
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{
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struct rte_eth_link link;
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic_disable(enic);
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memset(&link, 0, sizeof(link));
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rte_atomic64_cmpset((uint64_t *)ð_dev->data->dev_link,
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*(uint64_t *)ð_dev->data->dev_link,
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*(uint64_t *)&link);
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}
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/*
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* Stop device.
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*/
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static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic_remove(enic);
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}
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static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
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__rte_unused int wait_to_complete)
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{
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struct enic *enic = pmd_priv(eth_dev);
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int ret;
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int link_status = 0;
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ENICPMD_FUNC_TRACE();
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link_status = enic_get_link_status(enic);
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ret = (link_status == enic->link_status);
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enic->link_status = link_status;
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eth_dev->data->dev_link.link_status = link_status;
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eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
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eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
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return ret;
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}
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static void enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
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struct rte_eth_stats *stats)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic_dev_stats_get(enic, stats);
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}
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static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic_dev_stats_clear(enic);
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}
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static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
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struct rte_eth_dev_info *device_info)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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device_info->max_rx_queues = enic->rq_count;
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device_info->max_tx_queues = enic->wq_count;
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device_info->min_rx_bufsize = ENIC_MIN_MTU;
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device_info->max_rx_pktlen = enic->config.mtu;
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device_info->max_mac_addrs = 1;
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device_info->rx_offload_capa =
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DEV_RX_OFFLOAD_VLAN_STRIP |
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DEV_RX_OFFLOAD_IPV4_CKSUM |
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DEV_RX_OFFLOAD_UDP_CKSUM |
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DEV_RX_OFFLOAD_TCP_CKSUM;
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device_info->tx_offload_capa =
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DEV_TX_OFFLOAD_VLAN_INSERT |
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DEV_TX_OFFLOAD_IPV4_CKSUM |
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DEV_TX_OFFLOAD_UDP_CKSUM |
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DEV_TX_OFFLOAD_TCP_CKSUM;
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device_info->default_rxconf = (struct rte_eth_rxconf) {
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.rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
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};
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}
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static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
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{
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static const uint32_t ptypes[] = {
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RTE_PTYPE_L3_IPV4,
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RTE_PTYPE_L3_IPV6,
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RTE_PTYPE_UNKNOWN
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};
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if (dev->rx_pkt_burst == enic_recv_pkts)
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return ptypes;
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return NULL;
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}
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static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic->promisc = 1;
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enic_add_packet_filter(enic);
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}
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static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic->promisc = 0;
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enic_add_packet_filter(enic);
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}
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static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
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{
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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enic->allmulti = 1;
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enic_add_packet_filter(enic);
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}
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static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
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{
|
|
struct enic *enic = pmd_priv(eth_dev);
|
|
|
|
ENICPMD_FUNC_TRACE();
|
|
enic->allmulti = 0;
|
|
enic_add_packet_filter(enic);
|
|
}
|
|
|
|
static void enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
|
|
struct ether_addr *mac_addr,
|
|
__rte_unused uint32_t index, __rte_unused uint32_t pool)
|
|
{
|
|
struct enic *enic = pmd_priv(eth_dev);
|
|
|
|
ENICPMD_FUNC_TRACE();
|
|
enic_set_mac_address(enic, mac_addr->addr_bytes);
|
|
}
|
|
|
|
static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, __rte_unused uint32_t index)
|
|
{
|
|
struct enic *enic = pmd_priv(eth_dev);
|
|
|
|
ENICPMD_FUNC_TRACE();
|
|
enic_del_mac_address(enic);
|
|
}
|
|
|
|
|
|
static uint16_t enicpmd_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
|
|
uint16_t nb_pkts)
|
|
{
|
|
uint16_t index;
|
|
unsigned int frags;
|
|
unsigned int pkt_len;
|
|
unsigned int seg_len;
|
|
unsigned int inc_len;
|
|
unsigned int nb_segs;
|
|
struct rte_mbuf *tx_pkt, *next_tx_pkt;
|
|
struct vnic_wq *wq = (struct vnic_wq *)tx_queue;
|
|
struct enic *enic = vnic_dev_priv(wq->vdev);
|
|
unsigned short vlan_id;
|
|
unsigned short ol_flags;
|
|
uint8_t last_seg, eop;
|
|
unsigned int host_tx_descs = 0;
|
|
|
|
for (index = 0; index < nb_pkts; index++) {
|
|
tx_pkt = *tx_pkts++;
|
|
inc_len = 0;
|
|
nb_segs = tx_pkt->nb_segs;
|
|
if (nb_segs > vnic_wq_desc_avail(wq)) {
|
|
if (index > 0)
|
|
enic_post_wq_index(wq);
|
|
|
|
/* wq cleanup and try again */
|
|
if (!enic_cleanup_wq(enic, wq) ||
|
|
(nb_segs > vnic_wq_desc_avail(wq))) {
|
|
return index;
|
|
}
|
|
}
|
|
|
|
pkt_len = tx_pkt->pkt_len;
|
|
vlan_id = tx_pkt->vlan_tci;
|
|
ol_flags = tx_pkt->ol_flags;
|
|
for (frags = 0; inc_len < pkt_len; frags++) {
|
|
if (!tx_pkt)
|
|
break;
|
|
next_tx_pkt = tx_pkt->next;
|
|
seg_len = tx_pkt->data_len;
|
|
inc_len += seg_len;
|
|
|
|
host_tx_descs++;
|
|
last_seg = 0;
|
|
eop = 0;
|
|
if ((pkt_len == inc_len) || !next_tx_pkt) {
|
|
eop = 1;
|
|
/* post if last packet in batch or > thresh */
|
|
if ((index == (nb_pkts - 1)) ||
|
|
(host_tx_descs > ENIC_TX_POST_THRESH)) {
|
|
last_seg = 1;
|
|
host_tx_descs = 0;
|
|
}
|
|
}
|
|
enic_send_pkt(enic, wq, tx_pkt, (unsigned short)seg_len,
|
|
!frags, eop, last_seg, ol_flags, vlan_id);
|
|
tx_pkt = next_tx_pkt;
|
|
}
|
|
}
|
|
|
|
enic_cleanup_wq(enic, wq);
|
|
return index;
|
|
}
|
|
|
|
static const struct eth_dev_ops enicpmd_eth_dev_ops = {
|
|
.dev_configure = enicpmd_dev_configure,
|
|
.dev_start = enicpmd_dev_start,
|
|
.dev_stop = enicpmd_dev_stop,
|
|
.dev_set_link_up = NULL,
|
|
.dev_set_link_down = NULL,
|
|
.dev_close = enicpmd_dev_close,
|
|
.promiscuous_enable = enicpmd_dev_promiscuous_enable,
|
|
.promiscuous_disable = enicpmd_dev_promiscuous_disable,
|
|
.allmulticast_enable = enicpmd_dev_allmulticast_enable,
|
|
.allmulticast_disable = enicpmd_dev_allmulticast_disable,
|
|
.link_update = enicpmd_dev_link_update,
|
|
.stats_get = enicpmd_dev_stats_get,
|
|
.stats_reset = enicpmd_dev_stats_reset,
|
|
.queue_stats_mapping_set = NULL,
|
|
.dev_infos_get = enicpmd_dev_info_get,
|
|
.dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
|
|
.mtu_set = NULL,
|
|
.vlan_filter_set = enicpmd_vlan_filter_set,
|
|
.vlan_tpid_set = NULL,
|
|
.vlan_offload_set = enicpmd_vlan_offload_set,
|
|
.vlan_strip_queue_set = NULL,
|
|
.rx_queue_start = enicpmd_dev_rx_queue_start,
|
|
.rx_queue_stop = enicpmd_dev_rx_queue_stop,
|
|
.tx_queue_start = enicpmd_dev_tx_queue_start,
|
|
.tx_queue_stop = enicpmd_dev_tx_queue_stop,
|
|
.rx_queue_setup = enicpmd_dev_rx_queue_setup,
|
|
.rx_queue_release = enicpmd_dev_rx_queue_release,
|
|
.rx_queue_count = NULL,
|
|
.rx_descriptor_done = NULL,
|
|
.tx_queue_setup = enicpmd_dev_tx_queue_setup,
|
|
.tx_queue_release = enicpmd_dev_tx_queue_release,
|
|
.dev_led_on = NULL,
|
|
.dev_led_off = NULL,
|
|
.flow_ctrl_get = NULL,
|
|
.flow_ctrl_set = NULL,
|
|
.priority_flow_ctrl_set = NULL,
|
|
.mac_addr_add = enicpmd_add_mac_addr,
|
|
.mac_addr_remove = enicpmd_remove_mac_addr,
|
|
.filter_ctrl = enicpmd_dev_filter_ctrl,
|
|
};
|
|
|
|
struct enic *enicpmd_list_head = NULL;
|
|
/* Initialize the driver
|
|
* It returns 0 on success.
|
|
*/
|
|
static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
|
|
{
|
|
struct rte_pci_device *pdev;
|
|
struct rte_pci_addr *addr;
|
|
struct enic *enic = pmd_priv(eth_dev);
|
|
|
|
ENICPMD_FUNC_TRACE();
|
|
|
|
enic->port_id = eth_dev->data->port_id;
|
|
enic->rte_dev = eth_dev;
|
|
eth_dev->dev_ops = &enicpmd_eth_dev_ops;
|
|
eth_dev->rx_pkt_burst = &enic_recv_pkts;
|
|
eth_dev->tx_pkt_burst = &enicpmd_xmit_pkts;
|
|
|
|
pdev = eth_dev->pci_dev;
|
|
rte_eth_copy_pci_info(eth_dev, pdev);
|
|
enic->pdev = pdev;
|
|
addr = &pdev->addr;
|
|
|
|
snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
|
|
addr->domain, addr->bus, addr->devid, addr->function);
|
|
|
|
return enic_probe(enic);
|
|
}
|
|
|
|
static struct eth_driver rte_enic_pmd = {
|
|
.pci_drv = {
|
|
.name = "rte_enic_pmd",
|
|
.id_table = pci_id_enic_map,
|
|
.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
|
|
},
|
|
.eth_dev_init = eth_enicpmd_dev_init,
|
|
.dev_private_size = sizeof(struct enic),
|
|
};
|
|
|
|
/* Driver initialization routine.
|
|
* Invoked once at EAL init time.
|
|
* Register as the [Poll Mode] Driver of Cisco ENIC device.
|
|
*/
|
|
static int
|
|
rte_enic_pmd_init(__rte_unused const char *name,
|
|
__rte_unused const char *params)
|
|
{
|
|
ENICPMD_FUNC_TRACE();
|
|
|
|
rte_eth_driver_register(&rte_enic_pmd);
|
|
return 0;
|
|
}
|
|
|
|
static struct rte_driver rte_enic_driver = {
|
|
.type = PMD_PDEV,
|
|
.init = rte_enic_pmd_init,
|
|
};
|
|
|
|
PMD_REGISTER_DRIVER(rte_enic_driver);
|