d944410a44
If the nb_pkts parameter to rte_eth_tx_burst() was greater than
the TX descriptor count, a completion was not being requested
from the NIC, so descriptors would not be released back to the
host causing a lock-up.
Introduce a limit of how many TX descriptors can be used in a single
call to the enic PMD burst TX function before requesting a completion.
Fixes: d739ba4c6a ("enic: improve Tx packet rate")
Signed-off-by: John Daley <johndale@cisco.com>
155 lines
5.2 KiB
C
155 lines
5.2 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* Copyright (c) 2014, Cisco Systems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _ENIC_RES_H_
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#define _ENIC_RES_H_
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#include "wq_enet_desc.h"
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#include "rq_enet_desc.h"
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#include "vnic_wq.h"
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#include "vnic_rq.h"
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#define ENIC_MIN_WQ_DESCS 64
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#define ENIC_MAX_WQ_DESCS 4096
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#define ENIC_MIN_RQ_DESCS 64
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#define ENIC_MAX_RQ_DESCS 4096
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#define ENIC_MIN_MTU 68
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#define ENIC_MAX_MTU 9000
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#define ENIC_MULTICAST_PERFECT_FILTERS 32
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#define ENIC_UNICAST_PERFECT_FILTERS 32
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#define ENIC_NON_TSO_MAX_DESC 16
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#define ENIC_DEFAULT_RX_FREE_THRESH 32
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#define ENIC_TX_POST_THRESH (ENIC_MIN_WQ_DESCS / 2)
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#define ENIC_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)
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static inline void enic_queue_wq_desc_ex(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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unsigned int mss_or_csum_offset, unsigned int hdr_len,
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int vlan_tag_insert, unsigned int vlan_tag,
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int offload_mode, int cq_entry, int sop, int eop, int loopback)
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{
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struct wq_enet_desc *desc = vnic_wq_next_desc(wq);
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u8 desc_skip_cnt = 1;
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u8 compressed_send = 0;
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u64 wrid = 0;
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wq_enet_desc_enc(desc,
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(u64)dma_addr | VNIC_PADDR_TARGET,
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(u16)len,
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(u16)mss_or_csum_offset,
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(u16)hdr_len, (u8)offload_mode,
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(u8)eop, (u8)cq_entry,
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0, /* fcoe_encap */
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(u8)vlan_tag_insert,
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(u16)vlan_tag,
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(u8)loopback);
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vnic_wq_post(wq, os_buf, dma_addr, len, sop, eop, desc_skip_cnt,
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(u8)cq_entry, compressed_send, wrid);
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}
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static inline void enic_queue_wq_desc_cont(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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0, 0, 0, 0, 0,
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eop, 0 /* !SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc(struct vnic_wq *wq, void *os_buf,
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dma_addr_t dma_addr, unsigned int len, int vlan_tag_insert,
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unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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0, 0, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_CSUM,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc_csum(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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int ip_csum, int tcpudp_csum, int vlan_tag_insert,
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unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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(ip_csum ? 1 : 0) + (tcpudp_csum ? 2 : 0),
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0, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_CSUM,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc_csum_l4(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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unsigned int csum_offset, unsigned int hdr_len,
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int vlan_tag_insert, unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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csum_offset, hdr_len, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_CSUM_L4,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc_tso(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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unsigned int mss, unsigned int hdr_len, int vlan_tag_insert,
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unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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mss, hdr_len, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_TSO,
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eop, 1 /* SOP */, eop, loopback);
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}
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struct enic;
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int enic_get_vnic_config(struct enic *);
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int enic_add_vlan(struct enic *enic, u16 vlanid);
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int enic_del_vlan(struct enic *enic, u16 vlanid);
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int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
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u8 ig_vlan_strip_en);
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int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len);
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int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len);
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void enic_get_res_counts(struct enic *enic);
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void enic_init_vnic_resources(struct enic *enic);
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int enic_alloc_vnic_resources(struct enic *);
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void enic_free_vnic_resources(struct enic *);
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#endif /* _ENIC_RES_H_ */
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