6c9457c279
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Luca Boccassi <bluca@debian.org>
53 lines
1.7 KiB
Meson
53 lines
1.7 KiB
Meson
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2017 Intel Corporation
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# for checking defines we need to use the correct compiler flags
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march_opt = '-march=@0@'.format(machine)
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# we require SSE4.2 for DPDK
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sse_errormsg = '''SSE4.2 instruction set is required for DPDK.
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Please set the machine type to "nehalem" or "corei7" or higher value'''
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if cc.get_define('__SSE4_2__', args: march_opt) == ''
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error(sse_errormsg)
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endif
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base_flags = ['SSE', 'SSE2', 'SSE3','SSSE3', 'SSE4_1', 'SSE4_2']
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foreach f:base_flags
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dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1)
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compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
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endforeach
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dpdk_conf.set('RTE_ARCH_X86', 1)
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if (host_machine.cpu_family() == 'x86_64')
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dpdk_conf.set('RTE_ARCH_X86_64', 1)
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dpdk_conf.set('RTE_ARCH', 'x86_64')
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dpdk_conf.set('RTE_ARCH_64', 1)
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else
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dpdk_conf.set('RTE_ARCH_I686', 1)
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dpdk_conf.set('RTE_ARCH', 'i686')
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endif
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if cc.get_define('__AES__', args: march_opt) != ''
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dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
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compile_time_cpuflags += ['RTE_CPUFLAG_AES']
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endif
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if cc.get_define('__PCLMUL__', args: march_opt) != ''
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dpdk_conf.set('RTE_MACHINE_CPUFLAG_PCLMULQDQ', 1)
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compile_time_cpuflags += ['RTE_CPUFLAG_PCLMULQDQ']
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endif
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if cc.get_define('__AVX__', args: march_opt) != ''
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dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX', 1)
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compile_time_cpuflags += ['RTE_CPUFLAG_AVX']
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endif
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if cc.get_define('__AVX2__', args: march_opt) != ''
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dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX2', 1)
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compile_time_cpuflags += ['RTE_CPUFLAG_AVX2']
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endif
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if cc.get_define('__AVX512F__', args: march_opt) != ''
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dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX512F', 1)
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compile_time_cpuflags += ['RTE_CPUFLAG_AVX512F']
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endif
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dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
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