a9de470cc7
Since all other apps have been moved to the "app" folder, the autotest app remains alone in the test folder. Rather than having an entire top-level folder for this, we can move it back to where it all started in early versions of DPDK - the "app/" folder. This move has a couple of advantages: * This reduces clutter at the top level of the project, due to one less folder. * It eliminates the separate build task necessary for building the autotests using make "make test-build" which means that developers are less likely to miss something in their own compilation tests * It re-aligns the final location of the test binary in the app folder when building with make with it's location in the source tree. For meson builds, the autotest app is different from the other apps in that it needs a series of different test cases defined for it for use by "meson test". Therefore, it does not get built as part of the main loop in the app folder, but gets built separately at the end. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
601 lines
16 KiB
C
601 lines
16 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation
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*/
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#include "test.h"
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/*
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* Timer
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* =====
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*
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* #. Stress test 1.
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*
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* The objective of the timer stress tests is to check that there are no
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* race conditions in list and status management. This test launches,
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* resets and stops the timer very often on many cores at the same
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* time.
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*
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* - Only one timer is used for this test.
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* - On each core, the rte_timer_manage() function is called from the main
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* loop every 3 microseconds.
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* - In the main loop, the timer may be reset (randomly, with a
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* probability of 0.5 %) 100 microseconds later on a random core, or
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* stopped (with a probability of 0.5 % also).
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* - In callback, the timer is can be reset (randomly, with a
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* probability of 0.5 %) 100 microseconds later on the same core or
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* on another core (same probability), or stopped (same
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* probability).
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*
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* # Stress test 2.
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*
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* The objective of this test is similar to the first in that it attempts
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* to find if there are any race conditions in the timer library. However,
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* it is less complex in terms of operations performed and duration, as it
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* is designed to have a predictable outcome that can be tested.
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*
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* - A set of timers is initialized for use by the test
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* - All cores then simultaneously are set to schedule all the timers at
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* the same time, so conflicts should occur.
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* - Then there is a delay while we wait for the timers to expire
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* - Then the master lcore calls timer_manage() and we check that all
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* timers have had their callbacks called exactly once - no more no less.
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* - Then we repeat the process, except after setting up the timers, we have
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* all cores randomly reschedule them.
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* - Again we check that the expected number of callbacks has occurred when
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* we call timer-manage.
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*
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* #. Basic test.
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*
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* This test performs basic functional checks of the timers. The test
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* uses four different timers that are loaded and stopped under
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* specific conditions in specific contexts.
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*
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* - Four timers are used for this test.
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* - On each core, the rte_timer_manage() function is called from main loop
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* every 3 microseconds.
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*
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* The autotest python script checks that the behavior is correct:
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*
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* - timer0
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*
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* - At initialization, timer0 is loaded by the master core, on master core
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* in "single" mode (time = 1 second).
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* - In the first 19 callbacks, timer0 is reloaded on the same core,
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* then, it is explicitly stopped at the 20th call.
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* - At t=25s, timer0 is reloaded once by timer2.
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*
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* - timer1
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*
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* - At initialization, timer1 is loaded by the master core, on the
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* master core in "single" mode (time = 2 seconds).
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* - In the first 9 callbacks, timer1 is reloaded on another
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* core. After the 10th callback, timer1 is not reloaded anymore.
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*
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* - timer2
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*
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* - At initialization, timer2 is loaded by the master core, on the
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* master core in "periodical" mode (time = 1 second).
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* - In the callback, when t=25s, it stops timer3 and reloads timer0
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* on the current core.
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*
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* - timer3
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*
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* - At initialization, timer3 is loaded by the master core, on
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* another core in "periodical" mode (time = 1 second).
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* - It is stopped at t=25s by timer2.
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*/
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <inttypes.h>
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#include <sys/queue.h>
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#include <math.h>
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#include <rte_common.h>
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#include <rte_log.h>
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#include <rte_memory.h>
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#include <rte_launch.h>
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#include <rte_cycles.h>
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#include <rte_eal.h>
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#include <rte_per_lcore.h>
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#include <rte_lcore.h>
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#include <rte_atomic.h>
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#include <rte_timer.h>
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#include <rte_random.h>
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#include <rte_malloc.h>
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#include <rte_pause.h>
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#define TEST_DURATION_S 1 /* in seconds */
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#define NB_TIMER 4
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#define RTE_LOGTYPE_TESTTIMER RTE_LOGTYPE_USER3
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static volatile uint64_t end_time;
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static volatile int test_failed;
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struct mytimerinfo {
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struct rte_timer tim;
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unsigned id;
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unsigned count;
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};
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static struct mytimerinfo mytiminfo[NB_TIMER];
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static void timer_basic_cb(struct rte_timer *tim, void *arg);
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static void
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mytimer_reset(struct mytimerinfo *timinfo, uint64_t ticks,
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enum rte_timer_type type, unsigned tim_lcore,
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rte_timer_cb_t fct)
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{
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rte_timer_reset_sync(&timinfo->tim, ticks, type, tim_lcore,
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fct, timinfo);
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}
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/* timer callback for stress tests */
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static void
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timer_stress_cb(__attribute__((unused)) struct rte_timer *tim,
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__attribute__((unused)) void *arg)
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{
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long r;
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unsigned lcore_id = rte_lcore_id();
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uint64_t hz = rte_get_timer_hz();
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if (rte_timer_pending(tim))
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return;
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r = rte_rand();
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if ((r & 0xff) == 0) {
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mytimer_reset(&mytiminfo[0], hz, SINGLE, lcore_id,
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timer_stress_cb);
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}
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else if ((r & 0xff) == 1) {
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mytimer_reset(&mytiminfo[0], hz, SINGLE,
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rte_get_next_lcore(lcore_id, 0, 1),
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timer_stress_cb);
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}
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else if ((r & 0xff) == 2) {
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rte_timer_stop(&mytiminfo[0].tim);
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}
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}
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static int
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timer_stress_main_loop(__attribute__((unused)) void *arg)
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{
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uint64_t hz = rte_get_timer_hz();
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unsigned lcore_id = rte_lcore_id();
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uint64_t cur_time;
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int64_t diff = 0;
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long r;
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while (diff >= 0) {
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/* call the timer handler on each core */
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rte_timer_manage();
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/* simulate the processing of a packet
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* (1 us = 2000 cycles at 2 Ghz) */
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rte_delay_us(1);
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/* randomly stop or reset timer */
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r = rte_rand();
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lcore_id = rte_get_next_lcore(lcore_id, 0, 1);
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if ((r & 0xff) == 0) {
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/* 100 us */
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mytimer_reset(&mytiminfo[0], hz/10000, SINGLE, lcore_id,
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timer_stress_cb);
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}
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else if ((r & 0xff) == 1) {
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rte_timer_stop_sync(&mytiminfo[0].tim);
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}
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cur_time = rte_get_timer_cycles();
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diff = end_time - cur_time;
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}
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lcore_id = rte_lcore_id();
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RTE_LOG(INFO, TESTTIMER, "core %u finished\n", lcore_id);
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return 0;
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}
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/* Need to synchronize slave lcores through multiple steps. */
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enum { SLAVE_WAITING = 1, SLAVE_RUN_SIGNAL, SLAVE_RUNNING, SLAVE_FINISHED };
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static rte_atomic16_t slave_state[RTE_MAX_LCORE];
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static void
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master_init_slaves(void)
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{
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unsigned i;
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RTE_LCORE_FOREACH_SLAVE(i) {
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rte_atomic16_set(&slave_state[i], SLAVE_WAITING);
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}
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}
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static void
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master_start_slaves(void)
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{
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unsigned i;
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RTE_LCORE_FOREACH_SLAVE(i) {
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rte_atomic16_set(&slave_state[i], SLAVE_RUN_SIGNAL);
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}
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RTE_LCORE_FOREACH_SLAVE(i) {
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while (rte_atomic16_read(&slave_state[i]) != SLAVE_RUNNING)
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rte_pause();
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}
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}
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static void
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master_wait_for_slaves(void)
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{
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unsigned i;
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RTE_LCORE_FOREACH_SLAVE(i) {
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while (rte_atomic16_read(&slave_state[i]) != SLAVE_FINISHED)
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rte_pause();
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}
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}
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static void
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slave_wait_to_start(void)
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{
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unsigned lcore_id = rte_lcore_id();
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while (rte_atomic16_read(&slave_state[lcore_id]) != SLAVE_RUN_SIGNAL)
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rte_pause();
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rte_atomic16_set(&slave_state[lcore_id], SLAVE_RUNNING);
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}
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static void
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slave_finish(void)
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{
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unsigned lcore_id = rte_lcore_id();
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rte_atomic16_set(&slave_state[lcore_id], SLAVE_FINISHED);
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}
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static volatile int cb_count = 0;
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/* callback for second stress test. will only be called
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* on master lcore */
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static void
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timer_stress2_cb(struct rte_timer *tim __rte_unused, void *arg __rte_unused)
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{
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cb_count++;
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}
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#define NB_STRESS2_TIMERS 8192
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static int
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timer_stress2_main_loop(__attribute__((unused)) void *arg)
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{
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static struct rte_timer *timers;
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int i, ret;
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uint64_t delay = rte_get_timer_hz() / 20;
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unsigned lcore_id = rte_lcore_id();
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unsigned master = rte_get_master_lcore();
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int32_t my_collisions = 0;
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static rte_atomic32_t collisions;
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if (lcore_id == master) {
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cb_count = 0;
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test_failed = 0;
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rte_atomic32_set(&collisions, 0);
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master_init_slaves();
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timers = rte_malloc(NULL, sizeof(*timers) * NB_STRESS2_TIMERS, 0);
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if (timers == NULL) {
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printf("Test Failed\n");
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printf("- Cannot allocate memory for timers\n" );
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test_failed = 1;
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master_start_slaves();
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goto cleanup;
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}
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for (i = 0; i < NB_STRESS2_TIMERS; i++)
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rte_timer_init(&timers[i]);
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master_start_slaves();
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} else {
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slave_wait_to_start();
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if (test_failed)
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goto cleanup;
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}
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/* have all cores schedule all timers on master lcore */
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for (i = 0; i < NB_STRESS2_TIMERS; i++) {
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ret = rte_timer_reset(&timers[i], delay, SINGLE, master,
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timer_stress2_cb, NULL);
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/* there will be collisions when multiple cores simultaneously
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* configure the same timers */
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if (ret != 0)
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my_collisions++;
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}
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if (my_collisions != 0)
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rte_atomic32_add(&collisions, my_collisions);
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/* wait long enough for timers to expire */
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rte_delay_ms(100);
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/* all cores rendezvous */
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if (lcore_id == master) {
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master_wait_for_slaves();
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} else {
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slave_finish();
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}
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/* now check that we get the right number of callbacks */
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if (lcore_id == master) {
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my_collisions = rte_atomic32_read(&collisions);
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if (my_collisions != 0)
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printf("- %d timer reset collisions (OK)\n", my_collisions);
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rte_timer_manage();
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if (cb_count != NB_STRESS2_TIMERS) {
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printf("Test Failed\n");
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printf("- Stress test 2, part 1 failed\n");
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printf("- Expected %d callbacks, got %d\n", NB_STRESS2_TIMERS,
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cb_count);
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test_failed = 1;
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master_start_slaves();
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goto cleanup;
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}
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cb_count = 0;
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/* proceed */
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master_start_slaves();
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} else {
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/* proceed */
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slave_wait_to_start();
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if (test_failed)
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goto cleanup;
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}
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/* now test again, just stop and restart timers at random after init*/
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for (i = 0; i < NB_STRESS2_TIMERS; i++)
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rte_timer_reset(&timers[i], delay, SINGLE, master,
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timer_stress2_cb, NULL);
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/* pick random timer to reset, stopping them first half the time */
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for (i = 0; i < 100000; i++) {
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int r = rand() % NB_STRESS2_TIMERS;
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if (i % 2)
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rte_timer_stop(&timers[r]);
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rte_timer_reset(&timers[r], delay, SINGLE, master,
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timer_stress2_cb, NULL);
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}
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/* wait long enough for timers to expire */
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rte_delay_ms(100);
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/* now check that we get the right number of callbacks */
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if (lcore_id == master) {
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master_wait_for_slaves();
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rte_timer_manage();
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if (cb_count != NB_STRESS2_TIMERS) {
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printf("Test Failed\n");
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printf("- Stress test 2, part 2 failed\n");
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printf("- Expected %d callbacks, got %d\n", NB_STRESS2_TIMERS,
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cb_count);
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test_failed = 1;
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} else {
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printf("Test OK\n");
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}
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}
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cleanup:
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if (lcore_id == master) {
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master_wait_for_slaves();
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if (timers != NULL) {
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rte_free(timers);
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timers = NULL;
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}
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} else {
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slave_finish();
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}
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return 0;
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}
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/* timer callback for basic tests */
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static void
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timer_basic_cb(struct rte_timer *tim, void *arg)
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{
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struct mytimerinfo *timinfo = arg;
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uint64_t hz = rte_get_timer_hz();
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unsigned lcore_id = rte_lcore_id();
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uint64_t cur_time = rte_get_timer_cycles();
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if (rte_timer_pending(tim))
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return;
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timinfo->count ++;
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RTE_LOG(INFO, TESTTIMER,
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"%"PRIu64": callback id=%u count=%u on core %u\n",
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cur_time, timinfo->id, timinfo->count, lcore_id);
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/* reload timer 0 on same core */
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if (timinfo->id == 0 && timinfo->count < 20) {
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mytimer_reset(timinfo, hz, SINGLE, lcore_id, timer_basic_cb);
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return;
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}
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/* reload timer 1 on next core */
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if (timinfo->id == 1 && timinfo->count < 10) {
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mytimer_reset(timinfo, hz*2, SINGLE,
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rte_get_next_lcore(lcore_id, 0, 1),
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timer_basic_cb);
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return;
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}
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/* Explicitelly stop timer 0. Once stop() called, we can even
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* erase the content of the structure: it is not referenced
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* anymore by any code (in case of dynamic structure, it can
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* be freed) */
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if (timinfo->id == 0 && timinfo->count == 20) {
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/* stop_sync() is not needed, because we know that the
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* status of timer is only modified by this core */
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rte_timer_stop(tim);
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memset(tim, 0xAA, sizeof(struct rte_timer));
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return;
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}
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/* stop timer3, and restart a new timer0 (it was removed 5
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* seconds ago) for a single shot */
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if (timinfo->id == 2 && timinfo->count == 25) {
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rte_timer_stop_sync(&mytiminfo[3].tim);
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/* need to reinit because structure was erased with 0xAA */
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rte_timer_init(&mytiminfo[0].tim);
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mytimer_reset(&mytiminfo[0], hz, SINGLE, lcore_id,
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timer_basic_cb);
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}
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}
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static int
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timer_basic_main_loop(__attribute__((unused)) void *arg)
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{
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uint64_t hz = rte_get_timer_hz();
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unsigned lcore_id = rte_lcore_id();
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uint64_t cur_time;
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int64_t diff = 0;
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/* launch all timers on core 0 */
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if (lcore_id == rte_get_master_lcore()) {
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mytimer_reset(&mytiminfo[0], hz/4, SINGLE, lcore_id,
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timer_basic_cb);
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mytimer_reset(&mytiminfo[1], hz/2, SINGLE, lcore_id,
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timer_basic_cb);
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mytimer_reset(&mytiminfo[2], hz/4, PERIODICAL, lcore_id,
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timer_basic_cb);
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mytimer_reset(&mytiminfo[3], hz/4, PERIODICAL,
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rte_get_next_lcore(lcore_id, 0, 1),
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timer_basic_cb);
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}
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while (diff >= 0) {
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/* call the timer handler on each core */
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rte_timer_manage();
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/* simulate the processing of a packet
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* (3 us = 6000 cycles at 2 Ghz) */
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rte_delay_us(3);
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cur_time = rte_get_timer_cycles();
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diff = end_time - cur_time;
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}
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RTE_LOG(INFO, TESTTIMER, "core %u finished\n", lcore_id);
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return 0;
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}
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static int
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timer_sanity_check(void)
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{
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#ifdef RTE_LIBEAL_USE_HPET
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if (eal_timer_source != EAL_TIMER_HPET) {
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printf("Not using HPET, can't sanity check timer sources\n");
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return 0;
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}
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const uint64_t t_hz = rte_get_tsc_hz();
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const uint64_t h_hz = rte_get_hpet_hz();
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printf("Hertz values: TSC = %"PRIu64", HPET = %"PRIu64"\n", t_hz, h_hz);
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const uint64_t tsc_start = rte_get_tsc_cycles();
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const uint64_t hpet_start = rte_get_hpet_cycles();
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rte_delay_ms(100); /* delay 1/10 second */
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const uint64_t tsc_end = rte_get_tsc_cycles();
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const uint64_t hpet_end = rte_get_hpet_cycles();
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printf("Measured cycles: TSC = %"PRIu64", HPET = %"PRIu64"\n",
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tsc_end-tsc_start, hpet_end-hpet_start);
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const double tsc_time = (double)(tsc_end - tsc_start)/t_hz;
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const double hpet_time = (double)(hpet_end - hpet_start)/h_hz;
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/* get the percentage that the times differ by */
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const double time_diff = fabs(tsc_time - hpet_time)*100/tsc_time;
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printf("Measured time: TSC = %.4f, HPET = %.4f\n", tsc_time, hpet_time);
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printf("Elapsed time measured by TSC and HPET differ by %f%%\n",
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time_diff);
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if (time_diff > 0.1) {
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printf("Error times differ by >0.1%%");
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return -1;
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}
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#endif
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return 0;
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}
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static int
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test_timer(void)
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{
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unsigned i;
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uint64_t cur_time;
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uint64_t hz;
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/* sanity check our timer sources and timer config values */
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if (timer_sanity_check() < 0) {
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printf("Timer sanity checks failed\n");
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return TEST_FAILED;
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}
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if (rte_lcore_count() < 2) {
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printf("not enough lcores for this test\n");
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return TEST_FAILED;
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}
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/* init timer */
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for (i=0; i<NB_TIMER; i++) {
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memset(&mytiminfo[i], 0, sizeof(struct mytimerinfo));
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mytiminfo[i].id = i;
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rte_timer_init(&mytiminfo[i].tim);
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}
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/* calculate the "end of test" time */
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cur_time = rte_get_timer_cycles();
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hz = rte_get_timer_hz();
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end_time = cur_time + (hz * TEST_DURATION_S);
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/* start other cores */
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printf("Start timer stress tests\n");
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rte_eal_mp_remote_launch(timer_stress_main_loop, NULL, CALL_MASTER);
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rte_eal_mp_wait_lcore();
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/* stop timer 0 used for stress test */
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rte_timer_stop_sync(&mytiminfo[0].tim);
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/* run a second, slightly different set of stress tests */
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printf("\nStart timer stress tests 2\n");
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test_failed = 0;
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rte_eal_mp_remote_launch(timer_stress2_main_loop, NULL, CALL_MASTER);
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rte_eal_mp_wait_lcore();
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if (test_failed)
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return TEST_FAILED;
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/* calculate the "end of test" time */
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cur_time = rte_get_timer_cycles();
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hz = rte_get_timer_hz();
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end_time = cur_time + (hz * TEST_DURATION_S);
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/* start other cores */
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printf("\nStart timer basic tests\n");
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rte_eal_mp_remote_launch(timer_basic_main_loop, NULL, CALL_MASTER);
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rte_eal_mp_wait_lcore();
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/* stop all timers */
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for (i=0; i<NB_TIMER; i++) {
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rte_timer_stop_sync(&mytiminfo[i].tim);
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}
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rte_timer_dump_stats(stdout);
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return TEST_SUCCESS;
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}
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REGISTER_TEST_COMMAND(timer_autotest, test_timer);
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