6ae4ce8942
This patch moves the internal symbols to INTERNAL sections so that any change in them is not reported as ABI breakage. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> Acked-by: Ray Kinsella <mdr@ashroe.eu>
112 lines
3.1 KiB
C
112 lines
3.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2018 NXP
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*/
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#ifndef _DPAAX_IOVA_TABLE_H_
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#define _DPAAX_IOVA_TABLE_H_
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdbool.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <dirent.h>
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#include <fcntl.h>
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#include <glob.h>
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#include <errno.h>
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#include <arpa/inet.h>
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#include <rte_eal.h>
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#include <rte_branch_prediction.h>
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#include <rte_memory.h>
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#include <rte_malloc.h>
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struct dpaax_iovat_element {
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phys_addr_t start; /**< Start address of block of physical pages */
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size_t len; /**< Difference of end-start for quick access */
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uint64_t *pages; /**< VA for each physical page in this block */
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};
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struct dpaax_iova_table {
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unsigned int count; /**< No. of blocks of contiguous physical pages */
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struct dpaax_iovat_element entries[0];
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};
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/* Pointer to the table, which is common for DPAA/DPAA2 and only a single
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* instance is required across net/crypto/event drivers. This table is
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* populated iff devices are found on the bus.
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*/
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extern struct dpaax_iova_table *dpaax_iova_table_p;
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/* Device tree file for memory layout is named 'memory@<addr>' where the 'addr'
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* is SoC dependent, or even Uboot fixup dependent.
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*/
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#define MEM_NODE_PATH_GLOB "/proc/device-tree/memory[@0-9]*/reg"
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/* For Virtual Machines memory node is at different path (below) */
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#define MEM_NODE_PATH_GLOB_VM "/proc/device-tree/memory/reg"
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/* Device file should be multiple of 16 bytes, each containing 8 byte of addr
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* and its length. Assuming max of 5 entries.
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*/
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#define MEM_NODE_FILE_LEN ((16 * 5) + 1)
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/* Table is made up of DPAAX_MEM_SPLIT elements for each contiguous zone. This
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* helps avoid separate handling for cases where more than one size of hugepage
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* is supported.
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*/
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#define DPAAX_MEM_SPLIT (1<<21)
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#define DPAAX_MEM_SPLIT_MASK ~(DPAAX_MEM_SPLIT - 1) /**< Floor aligned */
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#define DPAAX_MEM_SPLIT_MASK_OFF (DPAAX_MEM_SPLIT - 1) /**< Offset */
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/* APIs exposed */
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__rte_internal
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int dpaax_iova_table_populate(void);
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__rte_internal
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void dpaax_iova_table_depopulate(void);
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__rte_internal
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int dpaax_iova_table_update(phys_addr_t paddr, void *vaddr, size_t length);
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__rte_internal
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void dpaax_iova_table_dump(void);
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static inline void *dpaax_iova_table_get_va(phys_addr_t paddr) __rte_hot;
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static inline void *
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dpaax_iova_table_get_va(phys_addr_t paddr) {
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unsigned int i = 0, index;
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void *vaddr = 0;
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phys_addr_t paddr_align = paddr & DPAAX_MEM_SPLIT_MASK;
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size_t offset = paddr & DPAAX_MEM_SPLIT_MASK_OFF;
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struct dpaax_iovat_element *entry;
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if (unlikely(dpaax_iova_table_p == NULL))
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return NULL;
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entry = dpaax_iova_table_p->entries;
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do {
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if (unlikely(i > dpaax_iova_table_p->count))
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break;
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if (paddr_align < entry[i].start) {
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/* Incorrect paddr; Not in memory range */
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return NULL;
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}
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if (paddr_align > (entry[i].start + entry[i].len)) {
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i++;
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continue;
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}
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/* paddr > entry->start && paddr <= entry->(start+len) */
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index = (paddr_align - entry[i].start)/DPAAX_MEM_SPLIT;
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vaddr = (void *)((uintptr_t)entry[i].pages[index] + offset);
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break;
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} while (1);
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return vaddr;
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}
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#endif /* _DPAAX_IOVA_TABLE_H_ */
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