Xueming Li 79807d6a6e net/mlx5: support zero size entry for indexed pool ...

To make indexed pool to be used as ID generator, this patch allows entry
size to be zero.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

2020-11-03 23:35:04 +01:00

..

baseband

baseband/acc100: remove useless checks

2020-11-02 09:24:40 +01:00

bus

bus/fslmc: switch sequence number to dynamic mbuf field

2020-10-31 22:14:37 +01:00

common

common/mlx5: add glue function for domain sync

2020-11-03 23:35:04 +01:00

compress

build: replace use of old build macros

2020-10-19 22:15:44 +02:00

crypto

crypto/aesni_mb: support Chacha-Poly in synchronous mode

2020-11-02 09:24:41 +01:00

event

event/dlb: add timeout ticks entry point

2020-11-02 14:46:02 +01:00

mempool

bus/fslmc: switch sequence number to dynamic mbuf field

2020-10-31 22:14:37 +01:00

net

net/mlx5: support zero size entry for indexed pool

2020-11-03 23:35:04 +01:00

raw

raw/ifpga/base: enhance driver reliability in multi-process

2020-11-03 23:34:29 +01:00

regex

common/mlx5: add ConnectX-7 and Bluefield-3 device IDs

2020-11-03 23:35:04 +01:00

vdpa

common/mlx5: add ConnectX-7 and Bluefield-3 device IDs

2020-11-03 23:35:04 +01:00

meson.build

drivers: add headers install helper

2020-10-22 14:16:22 +02:00