a0147be547
Xilinx acquired Solarflare in 2019. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Acked-by: James Fox <jamesfox@xilinx.com>
355 lines
8.2 KiB
C
355 lines
8.2 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019-2020 Xilinx, Inc.
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* Copyright(c) 2016-2019 Solarflare Communications Inc.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*/
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/*
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* At the momemt of writing DPDK v16.07 has notion of two types of
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* interrupts: LSC (link status change) and RXQ (receive indication).
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* It allows to register interrupt callback for entire device which is
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* not intended to be used for receive indication (i.e. link status
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* change indication only). The handler has no information which HW
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* interrupt has triggered it, so we don't know which event queue should
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* be polled/reprimed (except qmask in the case of legacy line interrupt).
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*/
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#include <rte_common.h>
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#include <rte_interrupts.h>
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#include "efx.h"
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#include "sfc.h"
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#include "sfc_log.h"
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#include "sfc_ev.h"
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static void
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sfc_intr_handle_mgmt_evq(struct sfc_adapter *sa)
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{
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struct sfc_evq *evq;
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rte_spinlock_lock(&sa->mgmt_evq_lock);
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evq = sa->mgmt_evq;
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if (!sa->mgmt_evq_running) {
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sfc_log_init(sa, "interrupt on not running management EVQ %u",
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evq->evq_index);
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} else {
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sfc_ev_qpoll(evq);
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if (sfc_ev_qprime(evq) != 0)
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sfc_err(sa, "cannot prime EVQ %u", evq->evq_index);
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}
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rte_spinlock_unlock(&sa->mgmt_evq_lock);
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}
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static void
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sfc_intr_line_handler(void *cb_arg)
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{
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struct sfc_adapter *sa = (struct sfc_adapter *)cb_arg;
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efx_nic_t *enp = sa->nic;
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boolean_t fatal;
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uint32_t qmask;
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unsigned int lsc_seq = sa->port.lsc_seq;
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
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sfc_log_init(sa, "entry");
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if (sa->state != SFC_ADAPTER_STARTED &&
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sa->state != SFC_ADAPTER_STARTING &&
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sa->state != SFC_ADAPTER_STOPPING) {
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sfc_log_init(sa,
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"interrupt on stopped adapter, don't reenable");
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goto exit;
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}
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efx_intr_status_line(enp, &fatal, &qmask);
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if (fatal) {
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(void)efx_intr_disable(enp);
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(void)efx_intr_fatal(enp);
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sfc_err(sa, "fatal, interrupts disabled");
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goto exit;
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}
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if (qmask & (1 << sa->mgmt_evq_index))
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sfc_intr_handle_mgmt_evq(sa);
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if (rte_intr_ack(&pci_dev->intr_handle) != 0)
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sfc_err(sa, "cannot reenable interrupts");
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sfc_log_init(sa, "done");
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exit:
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if (lsc_seq != sa->port.lsc_seq) {
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sfc_notice(sa, "link status change event: link %s",
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sa->eth_dev->data->dev_link.link_status ?
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"UP" : "DOWN");
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_rte_eth_dev_callback_process(sa->eth_dev,
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RTE_ETH_EVENT_INTR_LSC,
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NULL);
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}
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}
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static void
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sfc_intr_message_handler(void *cb_arg)
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{
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struct sfc_adapter *sa = (struct sfc_adapter *)cb_arg;
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efx_nic_t *enp = sa->nic;
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boolean_t fatal;
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unsigned int lsc_seq = sa->port.lsc_seq;
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
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sfc_log_init(sa, "entry");
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if (sa->state != SFC_ADAPTER_STARTED &&
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sa->state != SFC_ADAPTER_STARTING &&
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sa->state != SFC_ADAPTER_STOPPING) {
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sfc_log_init(sa, "adapter not-started, don't reenable");
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goto exit;
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}
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efx_intr_status_message(enp, sa->mgmt_evq_index, &fatal);
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if (fatal) {
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(void)efx_intr_disable(enp);
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(void)efx_intr_fatal(enp);
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sfc_err(sa, "fatal, interrupts disabled");
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goto exit;
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}
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sfc_intr_handle_mgmt_evq(sa);
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if (rte_intr_ack(&pci_dev->intr_handle) != 0)
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sfc_err(sa, "cannot reenable interrupts");
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sfc_log_init(sa, "done");
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exit:
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if (lsc_seq != sa->port.lsc_seq) {
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sfc_notice(sa, "link status change event");
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_rte_eth_dev_callback_process(sa->eth_dev,
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RTE_ETH_EVENT_INTR_LSC,
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NULL);
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}
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}
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int
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sfc_intr_start(struct sfc_adapter *sa)
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{
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struct sfc_intr *intr = &sa->intr;
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struct rte_intr_handle *intr_handle;
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struct rte_pci_device *pci_dev;
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int rc;
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sfc_log_init(sa, "entry");
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/*
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* The EFX common code event queue module depends on the interrupt
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* module. Ensure that the interrupt module is always initialized
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* (even if interrupts are not used). Status memory is required
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* for Siena only and may be NULL for EF10.
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*/
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sfc_log_init(sa, "efx_intr_init");
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rc = efx_intr_init(sa->nic, intr->type, NULL);
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if (rc != 0)
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goto fail_intr_init;
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pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
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intr_handle = &pci_dev->intr_handle;
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if (intr->handler != NULL) {
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if (intr->rxq_intr && rte_intr_cap_multiple(intr_handle)) {
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uint32_t intr_vector;
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intr_vector = sa->eth_dev->data->nb_rx_queues;
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rc = rte_intr_efd_enable(intr_handle, intr_vector);
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if (rc != 0)
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goto fail_rte_intr_efd_enable;
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}
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if (rte_intr_dp_is_en(intr_handle)) {
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intr_handle->intr_vec =
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rte_calloc("intr_vec",
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sa->eth_dev->data->nb_rx_queues, sizeof(int),
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0);
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if (intr_handle->intr_vec == NULL) {
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sfc_err(sa,
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"Failed to allocate %d rx_queues intr_vec",
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sa->eth_dev->data->nb_rx_queues);
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goto fail_intr_vector_alloc;
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}
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}
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sfc_log_init(sa, "rte_intr_callback_register");
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rc = rte_intr_callback_register(intr_handle, intr->handler,
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(void *)sa);
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if (rc != 0) {
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sfc_err(sa,
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"cannot register interrupt handler (rc=%d)",
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rc);
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/*
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* Convert error code from negative returned by RTE API
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* to positive used in the driver.
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*/
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rc = -rc;
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goto fail_rte_intr_cb_reg;
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}
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sfc_log_init(sa, "rte_intr_enable");
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rc = rte_intr_enable(intr_handle);
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if (rc != 0) {
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sfc_err(sa, "cannot enable interrupts (rc=%d)", rc);
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/*
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* Convert error code from negative returned by RTE API
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* to positive used in the driver.
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*/
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rc = -rc;
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goto fail_rte_intr_enable;
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}
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sfc_log_init(sa, "efx_intr_enable");
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efx_intr_enable(sa->nic);
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}
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sfc_log_init(sa, "done type=%u max_intr=%d nb_efd=%u vec=%p",
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intr_handle->type, intr_handle->max_intr,
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intr_handle->nb_efd, intr_handle->intr_vec);
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return 0;
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fail_rte_intr_enable:
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rte_intr_callback_unregister(intr_handle, intr->handler, (void *)sa);
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fail_rte_intr_cb_reg:
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rte_free(intr_handle->intr_vec);
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fail_intr_vector_alloc:
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rte_intr_efd_disable(intr_handle);
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fail_rte_intr_efd_enable:
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efx_intr_fini(sa->nic);
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fail_intr_init:
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sfc_log_init(sa, "failed %d", rc);
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return rc;
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}
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void
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sfc_intr_stop(struct sfc_adapter *sa)
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{
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struct sfc_intr *intr = &sa->intr;
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
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sfc_log_init(sa, "entry");
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if (intr->handler != NULL) {
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struct rte_intr_handle *intr_handle;
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int rc;
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efx_intr_disable(sa->nic);
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intr_handle = &pci_dev->intr_handle;
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rte_free(intr_handle->intr_vec);
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rte_intr_efd_disable(intr_handle);
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if (rte_intr_disable(intr_handle) != 0)
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sfc_err(sa, "cannot disable interrupts");
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while ((rc = rte_intr_callback_unregister(intr_handle,
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intr->handler, (void *)sa)) == -EAGAIN)
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;
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if (rc != 1)
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sfc_err(sa,
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"cannot unregister interrupt handler %d",
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rc);
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}
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efx_intr_fini(sa->nic);
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sfc_log_init(sa, "done");
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}
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int
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sfc_intr_configure(struct sfc_adapter *sa)
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{
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struct sfc_intr *intr = &sa->intr;
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sfc_log_init(sa, "entry");
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intr->handler = NULL;
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intr->lsc_intr = (sa->eth_dev->data->dev_conf.intr_conf.lsc != 0);
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intr->rxq_intr = (sa->eth_dev->data->dev_conf.intr_conf.rxq != 0);
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if (!intr->lsc_intr && !intr->rxq_intr)
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goto done;
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switch (intr->type) {
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case EFX_INTR_MESSAGE:
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intr->handler = sfc_intr_message_handler;
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break;
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case EFX_INTR_LINE:
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intr->handler = sfc_intr_line_handler;
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break;
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case EFX_INTR_INVALID:
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sfc_warn(sa, "interrupts are not supported");
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break;
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default:
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sfc_panic(sa, "unexpected EFX interrupt type %u\n", intr->type);
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break;
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}
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done:
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sfc_log_init(sa, "done");
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return 0;
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}
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void
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sfc_intr_close(struct sfc_adapter *sa)
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{
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sfc_log_init(sa, "entry");
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sfc_log_init(sa, "done");
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}
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int
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sfc_intr_attach(struct sfc_adapter *sa)
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{
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struct sfc_intr *intr = &sa->intr;
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
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sfc_log_init(sa, "entry");
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switch (pci_dev->intr_handle.type) {
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#ifdef RTE_EXEC_ENV_LINUX
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case RTE_INTR_HANDLE_UIO_INTX:
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case RTE_INTR_HANDLE_VFIO_LEGACY:
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intr->type = EFX_INTR_LINE;
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break;
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case RTE_INTR_HANDLE_UIO:
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case RTE_INTR_HANDLE_VFIO_MSI:
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case RTE_INTR_HANDLE_VFIO_MSIX:
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intr->type = EFX_INTR_MESSAGE;
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break;
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#endif
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default:
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intr->type = EFX_INTR_INVALID;
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break;
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}
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sfc_log_init(sa, "done");
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return 0;
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}
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void
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sfc_intr_detach(struct sfc_adapter *sa)
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{
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sfc_log_init(sa, "entry");
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sa->intr.type = EFX_INTR_INVALID;
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sfc_log_init(sa, "done");
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}
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