69 lines
2.9 KiB
C
69 lines
2.9 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IXGBE_BYPASS_H_
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#define _IXGBE_BYPASS_H_
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#ifdef RTE_NIC_BYPASS
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struct ixgbe_bypass_mac_ops {
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s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status);
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bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg);
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s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
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s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value);
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};
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struct ixgbe_bypass_info {
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uint64_t reset_tm;
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struct ixgbe_bypass_mac_ops ops;
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};
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struct rte_eth_dev;
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void ixgbe_bypass_init(struct rte_eth_dev *dev);
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s32 ixgbe_bypass_state_show(struct rte_eth_dev *dev, u32 *state);
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s32 ixgbe_bypass_state_store(struct rte_eth_dev *dev, u32 *new_state);
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s32 ixgbe_bypass_event_show(struct rte_eth_dev *dev, u32 event, u32 *state);
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s32 ixgbe_bypass_event_store(struct rte_eth_dev *dev, u32 event, u32 state);
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s32 ixgbe_bypass_wd_timeout_store(struct rte_eth_dev *dev, u32 timeout);
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s32 ixgbe_bypass_ver_show(struct rte_eth_dev *dev, u32 *ver);
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s32 ixgbe_bypass_wd_timeout_show(struct rte_eth_dev *dev, u32 *wd_timeout);
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s32 ixgbe_bypass_wd_reset(struct rte_eth_dev *dev);
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s32 ixgbe_bypass_init_shared_code(struct ixgbe_hw *hw);
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s32 ixgbe_bypass_init_hw(struct ixgbe_hw *hw);
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#endif /* RTE_NIC_BYPASS */
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#endif /* _IXGBE_BYPASS_H_ */
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