4a67a0573e
Advertise crypto adapter forward mode capability and set crypto adapter enqueue function in driver. Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
111 lines
3.3 KiB
C
111 lines
3.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#ifndef __OTX2_WORKER_DUAL_H__
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#define __OTX2_WORKER_DUAL_H__
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#include <rte_branch_prediction.h>
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#include <rte_common.h>
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#include <otx2_common.h>
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#include "otx2_evdev.h"
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#include "otx2_evdev_crypto_adptr_rx.h"
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/* SSO Operations */
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static __rte_always_inline uint16_t
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otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
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struct otx2_ssogws_state *ws_pair,
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struct rte_event *ev, const uint32_t flags,
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const void * const lookup_mem,
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struct otx2_timesync_info * const tstamp)
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{
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const uint64_t set_gw = BIT_ULL(16) | 1;
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union otx2_sso_event event;
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uint64_t tstamp_ptr;
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uint64_t get_work1;
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uint64_t mbuf;
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if (flags & NIX_RX_OFFLOAD_PTYPE_F)
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rte_prefetch_non_temporal(lookup_mem);
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#ifdef RTE_ARCH_ARM64
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asm volatile(
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"rty%=: \n"
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" ldr %[tag], [%[tag_loc]] \n"
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" ldr %[wqp], [%[wqp_loc]] \n"
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" tbnz %[tag], 63, rty%= \n"
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"done%=: str %[gw], [%[pong]] \n"
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" dmb ld \n"
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" prfm pldl1keep, [%[wqp], #8]\n"
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" sub %[mbuf], %[wqp], #0x80 \n"
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" prfm pldl1keep, [%[mbuf]] \n"
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: [tag] "=&r" (event.get_work0),
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[wqp] "=&r" (get_work1),
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[mbuf] "=&r" (mbuf)
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: [tag_loc] "r" (ws->tag_op),
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[wqp_loc] "r" (ws->wqp_op),
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[gw] "r" (set_gw),
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[pong] "r" (ws_pair->getwrk_op)
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);
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#else
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event.get_work0 = otx2_read64(ws->tag_op);
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while ((BIT_ULL(63)) & event.get_work0)
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event.get_work0 = otx2_read64(ws->tag_op);
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get_work1 = otx2_read64(ws->wqp_op);
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otx2_write64(set_gw, ws_pair->getwrk_op);
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rte_prefetch0((const void *)get_work1);
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mbuf = (uint64_t)((char *)get_work1 - sizeof(struct rte_mbuf));
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rte_prefetch0((const void *)mbuf);
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#endif
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event.get_work0 = (event.get_work0 & (0x3ull << 32)) << 6 |
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(event.get_work0 & (0x3FFull << 36)) << 4 |
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(event.get_work0 & 0xffffffff);
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if (event.sched_type != SSO_TT_EMPTY) {
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if ((flags & NIX_RX_OFFLOAD_SECURITY_F) &&
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(event.event_type == RTE_EVENT_TYPE_CRYPTODEV)) {
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get_work1 = otx2_handle_crypto_event(get_work1);
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} else if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
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uint8_t port = event.sub_event_type;
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event.sub_event_type = 0;
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otx2_wqe_to_mbuf(get_work1, mbuf, port,
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event.flow_id, flags, lookup_mem);
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/* Extracting tstamp, if PTP enabled. CGX will prepend
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* the timestamp at starting of packet data and it can
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* be derieved from WQE 9 dword which corresponds to SG
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* iova.
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* rte_pktmbuf_mtod_offset can be used for this purpose
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* but it brings down the performance as it reads
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* mbuf->buf_addr which is not part of cache in general
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* fast path.
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*/
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tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)
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get_work1) +
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OTX2_SSO_WQE_SG_PTR);
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otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp,
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flags, (uint64_t *)tstamp_ptr);
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get_work1 = mbuf;
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}
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}
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ev->event = event.get_work0;
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ev->u64 = get_work1;
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return !!get_work1;
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}
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static __rte_always_inline void
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otx2_ssogws_dual_add_work(struct otx2_ssogws_dual *ws, const uint64_t event_ptr,
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const uint32_t tag, const uint8_t new_tt,
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const uint16_t grp)
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{
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uint64_t add_work0;
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add_work0 = tag | ((uint64_t)(new_tt) << 32);
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otx2_store_pair(add_work0, event_ptr, ws->grps_base[grp]);
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}
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#endif
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