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According to latest DSA spec[1], the work-queue config register size should be based off a value read from the WQ capabilities register. Update driver to read this value and base the start of each WQ config off that value. [1] https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html Fixes: ff06fa2cf3ba ("raw/ioat: probe idxd PCI") Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Tested-by: Kevin Laatz <kevin.laatz@intel.com>