dbd4defea5
Add option to configure unique mempool for each ethernet device port. The new option available with `pipeline_atq` and `pipeline_queue` tests. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
192 lines
6.1 KiB
C
192 lines
6.1 KiB
C
/*
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* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2017 Cavium, Inc.
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*/
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#ifndef _TEST_PIPELINE_COMMON_
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#define _TEST_PIPELINE_COMMON_
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#include <stdio.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <rte_cycles.h>
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#include <rte_ethdev.h>
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#include <rte_eventdev.h>
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#include <rte_event_eth_rx_adapter.h>
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#include <rte_event_eth_tx_adapter.h>
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#include <rte_lcore.h>
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#include <rte_malloc.h>
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#include <rte_mempool.h>
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#include <rte_prefetch.h>
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#include <rte_spinlock.h>
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#include <rte_service.h>
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#include <rte_service_component.h>
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#include "evt_common.h"
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#include "evt_options.h"
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#include "evt_test.h"
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struct test_pipeline;
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struct worker_data {
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uint64_t processed_pkts;
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uint8_t dev_id;
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uint8_t port_id;
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struct test_pipeline *t;
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} __rte_cache_aligned;
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struct test_pipeline {
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/* Don't change the offset of "done". Signal handler use this memory
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* to terminate all lcores work.
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*/
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int done;
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uint8_t nb_workers;
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uint8_t internal_port;
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uint8_t tx_evqueue_id[RTE_MAX_ETHPORTS];
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enum evt_test_result result;
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uint32_t nb_flows;
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uint64_t outstand_pkts;
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struct rte_mempool *pool[RTE_MAX_ETHPORTS];
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struct worker_data worker[EVT_MAX_PORTS];
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struct evt_options *opt;
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uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned;
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} __rte_cache_aligned;
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#define BURST_SIZE 16
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#define PIPELINE_WORKER_SINGLE_STAGE_INIT \
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struct worker_data *w = arg; \
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struct test_pipeline *t = w->t; \
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const uint8_t dev = w->dev_id; \
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const uint8_t port = w->port_id; \
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struct rte_event ev __rte_cache_aligned
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#define PIPELINE_WORKER_SINGLE_STAGE_BURST_INIT \
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int i; \
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struct worker_data *w = arg; \
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struct test_pipeline *t = w->t; \
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const uint8_t dev = w->dev_id; \
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const uint8_t port = w->port_id; \
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struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
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#define PIPELINE_WORKER_MULTI_STAGE_INIT \
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struct worker_data *w = arg; \
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struct test_pipeline *t = w->t; \
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uint8_t cq_id; \
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const uint8_t dev = w->dev_id; \
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const uint8_t port = w->port_id; \
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const uint8_t last_queue = t->opt->nb_stages - 1; \
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uint8_t *const sched_type_list = &t->sched_type_list[0]; \
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const uint8_t nb_stages = t->opt->nb_stages + 1; \
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struct rte_event ev __rte_cache_aligned
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#define PIPELINE_WORKER_MULTI_STAGE_BURST_INIT \
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int i; \
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struct worker_data *w = arg; \
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struct test_pipeline *t = w->t; \
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uint8_t cq_id; \
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const uint8_t dev = w->dev_id; \
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const uint8_t port = w->port_id; \
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const uint8_t last_queue = t->opt->nb_stages - 1; \
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uint8_t *const sched_type_list = &t->sched_type_list[0]; \
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const uint8_t nb_stages = t->opt->nb_stages + 1; \
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struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
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static __rte_always_inline void
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pipeline_fwd_event(struct rte_event *ev, uint8_t sched)
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{
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ev->event_type = RTE_EVENT_TYPE_CPU;
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ev->op = RTE_EVENT_OP_FORWARD;
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ev->sched_type = sched;
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}
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static __rte_always_inline void
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pipeline_fwd_event_vector(struct rte_event *ev, uint8_t sched)
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{
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ev->event_type = RTE_EVENT_TYPE_CPU_VECTOR;
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ev->op = RTE_EVENT_OP_FORWARD;
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ev->sched_type = sched;
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}
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static __rte_always_inline void
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pipeline_event_tx(const uint8_t dev, const uint8_t port,
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struct rte_event * const ev)
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{
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rte_event_eth_tx_adapter_txq_set(ev->mbuf, 0);
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while (!rte_event_eth_tx_adapter_enqueue(dev, port, ev, 1, 0))
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rte_pause();
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}
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static __rte_always_inline void
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pipeline_event_tx_vector(const uint8_t dev, const uint8_t port,
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struct rte_event *const ev)
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{
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ev->vec->queue = 0;
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while (!rte_event_eth_tx_adapter_enqueue(dev, port, ev, 1, 0))
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rte_pause();
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}
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static __rte_always_inline void
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pipeline_event_tx_burst(const uint8_t dev, const uint8_t port,
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struct rte_event *ev, const uint16_t nb_rx)
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{
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uint16_t enq;
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enq = rte_event_eth_tx_adapter_enqueue(dev, port, ev, nb_rx, 0);
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while (enq < nb_rx) {
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enq += rte_event_eth_tx_adapter_enqueue(dev, port,
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ev + enq, nb_rx - enq, 0);
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}
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}
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static __rte_always_inline void
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pipeline_event_enqueue(const uint8_t dev, const uint8_t port,
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struct rte_event *ev)
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{
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while (rte_event_enqueue_burst(dev, port, ev, 1) != 1)
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rte_pause();
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}
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static __rte_always_inline void
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pipeline_event_enqueue_burst(const uint8_t dev, const uint8_t port,
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struct rte_event *ev, const uint16_t nb_rx)
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{
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uint16_t enq;
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enq = rte_event_enqueue_burst(dev, port, ev, nb_rx);
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while (enq < nb_rx) {
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enq += rte_event_enqueue_burst(dev, port,
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ev + enq, nb_rx - enq);
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}
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}
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static inline int
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pipeline_nb_event_ports(struct evt_options *opt)
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{
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return evt_nr_active_lcores(opt->wlcores);
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}
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int pipeline_test_result(struct evt_test *test, struct evt_options *opt);
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int pipeline_opt_check(struct evt_options *opt, uint64_t nb_queues);
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int pipeline_test_setup(struct evt_test *test, struct evt_options *opt);
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int pipeline_ethdev_setup(struct evt_test *test, struct evt_options *opt);
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int pipeline_event_rx_adapter_setup(struct evt_options *opt, uint8_t stride,
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struct rte_event_port_conf prod_conf);
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int pipeline_event_tx_adapter_setup(struct evt_options *opt,
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struct rte_event_port_conf prod_conf);
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int pipeline_mempool_setup(struct evt_test *test, struct evt_options *opt);
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int pipeline_event_port_setup(struct evt_test *test, struct evt_options *opt,
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uint8_t *queue_arr, uint8_t nb_queues,
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const struct rte_event_port_conf p_conf);
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int pipeline_launch_lcores(struct evt_test *test, struct evt_options *opt,
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int (*worker)(void *));
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void pipeline_opt_dump(struct evt_options *opt, uint8_t nb_queues);
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void pipeline_test_destroy(struct evt_test *test, struct evt_options *opt);
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void pipeline_eventdev_destroy(struct evt_test *test, struct evt_options *opt);
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void pipeline_ethdev_destroy(struct evt_test *test, struct evt_options *opt);
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void pipeline_mempool_destroy(struct evt_test *test, struct evt_options *opt);
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#endif /* _TEST_PIPELINE_COMMON_ */
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