5dbbc2ab4a
Adding the PIE support for IP Pipeline Signed-off-by: Wojciech Liguzinski <wojciechx.liguzinski@intel.com> Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com> Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
322 lines
8.5 KiB
C
322 lines
8.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2018 Intel Corporation
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*/
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#include <stdlib.h>
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#include <rte_common.h>
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#include <rte_string_fns.h>
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#include "tmgr.h"
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static struct rte_sched_subport_profile_params
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subport_profile[TMGR_SUBPORT_PROFILE_MAX];
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static uint32_t n_subport_profiles;
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static struct rte_sched_pipe_params
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pipe_profile[TMGR_PIPE_PROFILE_MAX];
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#ifdef RTE_SCHED_CMAN
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static struct rte_sched_cman_params cman_params = {
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.red_params = {
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/* Traffic Class 0 Colors Green / Yellow / Red */
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[0][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[0][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[0][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 1 - Colors Green / Yellow / Red */
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[1][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[1][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[1][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 2 - Colors Green / Yellow / Red */
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[2][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[2][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[2][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 3 - Colors Green / Yellow / Red */
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[3][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[3][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[3][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 4 - Colors Green / Yellow / Red */
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[4][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[4][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[4][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 5 - Colors Green / Yellow / Red */
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[5][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[5][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[5][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 6 - Colors Green / Yellow / Red */
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[6][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[6][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[6][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 7 - Colors Green / Yellow / Red */
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[7][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[7][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[7][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 8 - Colors Green / Yellow / Red */
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[8][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[8][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[8][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 9 - Colors Green / Yellow / Red */
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[9][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[9][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[9][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 10 - Colors Green / Yellow / Red */
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[10][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[10][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[10][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 11 - Colors Green / Yellow / Red */
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[11][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[11][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[11][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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/* Traffic Class 12 - Colors Green / Yellow / Red */
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[12][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[12][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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[12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
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},
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};
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#endif /* RTE_SCHED_CMAN */
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static uint32_t n_pipe_profiles;
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static const struct rte_sched_subport_params subport_params_default = {
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.n_pipes_per_subport_enabled = 0, /* filled at runtime */
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.qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64},
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.pipe_profiles = pipe_profile,
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.n_pipe_profiles = 0, /* filled at run time */
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.n_max_pipe_profiles = RTE_DIM(pipe_profile),
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#ifdef RTE_SCHED_CMAN
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.cman_params = &cman_params,
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#endif /* RTE_SCHED_CMAN */
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};
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static struct tmgr_port_list tmgr_port_list;
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int
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tmgr_init(void)
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{
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TAILQ_INIT(&tmgr_port_list);
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return 0;
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}
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struct tmgr_port *
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tmgr_port_find(const char *name)
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{
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struct tmgr_port *tmgr_port;
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if (name == NULL)
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return NULL;
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TAILQ_FOREACH(tmgr_port, &tmgr_port_list, node)
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if (strcmp(tmgr_port->name, name) == 0)
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return tmgr_port;
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return NULL;
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}
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int
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tmgr_subport_profile_add(struct rte_sched_subport_profile_params *params)
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{
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/* Check input params */
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if (params == NULL)
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return -1;
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/* Save profile */
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memcpy(&subport_profile[n_subport_profiles],
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params,
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sizeof(*params));
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n_subport_profiles++;
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return 0;
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}
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int
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tmgr_pipe_profile_add(struct rte_sched_pipe_params *p)
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{
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/* Check input params */
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if (p == NULL)
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return -1;
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/* Save profile */
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memcpy(&pipe_profile[n_pipe_profiles],
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p,
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sizeof(*p));
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n_pipe_profiles++;
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return 0;
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}
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struct tmgr_port *
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tmgr_port_create(const char *name, struct tmgr_port_params *params)
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{
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struct rte_sched_subport_params subport_params;
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struct rte_sched_port_params p;
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struct tmgr_port *tmgr_port;
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struct rte_sched_port *s;
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uint32_t i, j;
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/* Check input params */
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if ((name == NULL) ||
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tmgr_port_find(name) ||
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(params == NULL) ||
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(params->n_subports_per_port == 0) ||
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(params->n_pipes_per_subport == 0) ||
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(params->cpu_id >= RTE_MAX_NUMA_NODES) ||
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(n_subport_profiles == 0) ||
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(n_pipe_profiles == 0))
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return NULL;
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/* Resource create */
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p.name = name;
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p.socket = (int) params->cpu_id;
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p.rate = params->rate;
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p.mtu = params->mtu;
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p.frame_overhead = params->frame_overhead;
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p.n_subports_per_port = params->n_subports_per_port;
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p.n_subport_profiles = n_subport_profiles;
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p.subport_profiles = subport_profile;
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p.n_max_subport_profiles = TMGR_SUBPORT_PROFILE_MAX;
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p.n_pipes_per_subport = params->n_pipes_per_subport;
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s = rte_sched_port_config(&p);
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if (s == NULL)
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return NULL;
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memcpy(&subport_params, &subport_params_default,
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sizeof(subport_params_default));
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subport_params.n_pipe_profiles = n_pipe_profiles;
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subport_params.n_pipes_per_subport_enabled =
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params->n_pipes_per_subport;
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for (i = 0; i < params->n_subports_per_port; i++) {
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int status;
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status = rte_sched_subport_config(
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s,
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i,
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&subport_params,
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0);
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if (status) {
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rte_sched_port_free(s);
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return NULL;
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}
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for (j = 0; j < params->n_pipes_per_subport; j++) {
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status = rte_sched_pipe_config(
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s,
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i,
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j,
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0);
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if (status) {
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rte_sched_port_free(s);
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return NULL;
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}
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}
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}
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/* Node allocation */
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tmgr_port = calloc(1, sizeof(struct tmgr_port));
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if (tmgr_port == NULL) {
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rte_sched_port_free(s);
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return NULL;
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}
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/* Node fill in */
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strlcpy(tmgr_port->name, name, sizeof(tmgr_port->name));
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tmgr_port->s = s;
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tmgr_port->n_subports_per_port = params->n_subports_per_port;
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tmgr_port->n_pipes_per_subport = params->n_pipes_per_subport;
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/* Node add to list */
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TAILQ_INSERT_TAIL(&tmgr_port_list, tmgr_port, node);
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return tmgr_port;
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}
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int
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tmgr_subport_config(const char *port_name,
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uint32_t subport_id,
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uint32_t subport_profile_id)
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{
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struct tmgr_port *port;
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int status;
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/* Check input params */
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if (port_name == NULL)
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return -1;
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port = tmgr_port_find(port_name);
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if ((port == NULL) ||
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(subport_id >= port->n_subports_per_port) ||
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(subport_profile_id >= n_subport_profiles))
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return -1;
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/* Resource config */
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status = rte_sched_subport_config(
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port->s,
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subport_id,
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NULL,
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subport_profile_id);
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return status;
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}
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int
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tmgr_pipe_config(const char *port_name,
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uint32_t subport_id,
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uint32_t pipe_id_first,
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uint32_t pipe_id_last,
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uint32_t pipe_profile_id)
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{
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struct tmgr_port *port;
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uint32_t i;
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/* Check input params */
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if (port_name == NULL)
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return -1;
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port = tmgr_port_find(port_name);
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if ((port == NULL) ||
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(subport_id >= port->n_subports_per_port) ||
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(pipe_id_first >= port->n_pipes_per_subport) ||
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(pipe_id_last >= port->n_pipes_per_subport) ||
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(pipe_id_first > pipe_id_last) ||
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(pipe_profile_id >= n_pipe_profiles))
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return -1;
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/* Resource config */
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for (i = pipe_id_first; i <= pipe_id_last; i++) {
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int status;
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status = rte_sched_pipe_config(
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port->s,
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subport_id,
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i,
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(int) pipe_profile_id);
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if (status)
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return status;
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}
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return 0;
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}
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